forked from luck/tmp_suning_uos_patched
dmaengine: sun6i: Add support for Allwinner H3 (sun8i) variant
The H3 SoC has the same dma engine as the A31 (sun6i), with a reduced amount of endpoints and physical channels. Add the proper config data and compatible string to support it. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
parent
385f83f85c
commit
f008db8c00
|
@ -4,7 +4,10 @@ This driver follows the generic DMA bindings defined in dma.txt.
|
|||
|
||||
Required properties:
|
||||
|
||||
- compatible: Must be "allwinner,sun6i-a31-dma" or "allwinner,sun8i-a23-dma"
|
||||
- compatible: Must be one of
|
||||
"allwinner,sun6i-a31-dma"
|
||||
"allwinner,sun8i-a23-dma"
|
||||
"allwinner,sun8i-h3-dma"
|
||||
- reg: Should contain the registers base address and length
|
||||
- interrupts: Should contain a reference to the interrupt used by this device
|
||||
- clocks: Should contain a reference to the parent AHB clock
|
||||
|
|
|
@ -891,9 +891,21 @@ static struct sun6i_dma_config sun8i_a23_dma_cfg = {
|
|||
.nr_max_vchans = 37,
|
||||
};
|
||||
|
||||
/*
|
||||
* The H3 has 12 physical channels, a maximum DRQ port id of 27,
|
||||
* and a total of 34 usable source and destination endpoints.
|
||||
*/
|
||||
|
||||
static struct sun6i_dma_config sun8i_h3_dma_cfg = {
|
||||
.nr_max_channels = 12,
|
||||
.nr_max_requests = 27,
|
||||
.nr_max_vchans = 34,
|
||||
};
|
||||
|
||||
static const struct of_device_id sun6i_dma_match[] = {
|
||||
{ .compatible = "allwinner,sun6i-a31-dma", .data = &sun6i_a31_dma_cfg },
|
||||
{ .compatible = "allwinner,sun8i-a23-dma", .data = &sun8i_a23_dma_cfg },
|
||||
{ .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
|
||||
|
|
Loading…
Reference in New Issue
Block a user