forked from luck/tmp_suning_uos_patched
mmc: Allow 2 byte requests in 4-bit mode for tmio_mmc
Adjust the tmio_mmc block size check to accept 2-byte requests in 4-bit mode if the hardware supports it. Tested with the SDHI hardware block included in sh7724. Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Signed-off-by: Matt Fleming <matt@console-pimps.org> Acked-by: Magnus Damm <damm@opensource.se> Tested-by: Arnd Hannemann <arnd@arndnet.de> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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68accd7370
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@ -125,6 +125,12 @@ static int __devinit sh_mobile_sdhi_probe(struct platform_device *pdev)
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mmc_data->capabilities |= p->tmio_caps;
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}
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/*
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* All SDHI blocks support 2-byte and larger block sizes in 4-bit
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* bus width mode.
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*/
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mmc_data->flags |= TMIO_MMC_BLKSZ_2BYTES;
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if (p && p->dma_slave_tx >= 0 && p->dma_slave_rx >= 0) {
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priv->param_tx.slave_id = p->dma_slave_tx;
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priv->param_rx.slave_id = p->dma_slave_rx;
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@ -658,14 +658,21 @@ static void tmio_mmc_release_dma(struct tmio_mmc_host *host)
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static int tmio_mmc_start_data(struct tmio_mmc_host *host,
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struct mmc_data *data)
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{
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struct mfd_cell *cell = host->pdev->dev.platform_data;
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struct tmio_mmc_data *pdata = cell->driver_data;
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pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
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data->blksz, data->blocks);
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/* Hardware cannot perform 1 and 2 byte requests in 4 bit mode */
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if (data->blksz < 4 && host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
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pr_err("%s: %d byte block unsupported in 4 bit mode\n",
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mmc_hostname(host->mmc), data->blksz);
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return -EINVAL;
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/* Some hardware cannot perform 2 byte requests in 4 bit mode */
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if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
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int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
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if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
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pr_err("%s: %d byte block unsupported in 4 bit mode\n",
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mmc_hostname(host->mmc), data->blksz);
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return -EINVAL;
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}
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}
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tmio_mmc_init_sg(host, data);
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@ -52,6 +52,11 @@
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/* tmio MMC platform flags */
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#define TMIO_MMC_WRPROTECT_DISABLE (1 << 0)
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/*
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* Some controllers can support a 2-byte block size when the bus width
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* is configured in 4-bit mode.
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*/
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#define TMIO_MMC_BLKSZ_2BYTES (1 << 1)
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int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
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int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
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