ARM: OMAP4: cm: add bitfield width values

The new common clk framework includes basic definitions for mux and
divider clocks.  These definitions depend on shift and width values
instead of the pre-computed masks that the OMAP clk framework has
traditionally used when accessing the register to control the mux or
divisor.

To ease this transition the masks are left intact and the width field is
simply added alongside the shift and mask data.

Signed-off-by: Mike Turquette <mturquette@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This commit is contained in:
Mike Turquette 2012-09-19 18:04:14 -06:00 committed by Paul Walmsley
parent 5dcc3b975e
commit f19a302247

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