forked from luck/tmp_suning_uos_patched
arm64: tegra: Fix Tegra194 PCIe EP compatible string
[ Upstream commit bf2942a8b7c38e8cc2d5157b4f0323d7f4e5ec71 ] The initialization sequence performed by the generic platform driver pcie-designware-plat.c for a DWC based implementation doesn't work for Tegra194. Tegra194 has a different initialization sequence requirement which can only be satisfied by the Tegra194 specific platform driver pcie-tegra194.c. So, remove the generic compatible string "snps,dw-pcie-ep" from Tegra194's endpoint controller nodes. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -1976,7 +1976,7 @@ pcie@141a0000 {
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};
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pcie_ep@14160000 {
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compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";
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compatible = "nvidia,tegra194-pcie-ep";
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power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX4A>;
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reg = <0x00 0x14160000 0x0 0x00020000>, /* appl registers (128K) */
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<0x00 0x36040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
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@ -2008,7 +2008,7 @@ pcie_ep@14160000 {
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};
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pcie_ep@14180000 {
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compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";
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compatible = "nvidia,tegra194-pcie-ep";
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power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8B>;
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reg = <0x00 0x14180000 0x0 0x00020000>, /* appl registers (128K) */
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<0x00 0x38040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
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@ -2040,7 +2040,7 @@ pcie_ep@14180000 {
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};
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pcie_ep@141a0000 {
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compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";
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compatible = "nvidia,tegra194-pcie-ep";
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power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8A>;
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reg = <0x00 0x141a0000 0x0 0x00020000>, /* appl registers (128K) */
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<0x00 0x3a040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
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