forked from luck/tmp_suning_uos_patched
[PATCH] x86: cpuid.4 doesn't need cpu level 5
Detecting cache line using cpuid.4, cpuid level 4 is enough. Signed-off-by: Shaohua Li<shaohua.li@intel.com> Cc: Dave Jones <davej@codemonkey.org.uk> Cc: "Seth, Rohit" <rohit.seth@intel.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -174,7 +174,7 @@ unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
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unsigned int new_l1d = 0, new_l1i = 0; /* Cache sizes from cpuid(4) */
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unsigned int new_l2 = 0, new_l3 = 0, i; /* Cache sizes from cpuid(4) */
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if (c->cpuid_level > 4) {
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if (c->cpuid_level > 3) {
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static int is_initialized;
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if (is_initialized == 0) {
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