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SolutionEngine771x: add Ether TSU resource

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After the  Ether platform data is fixed, the driver probe() method would
still fail since the 'struct sh_eth_cpu_data' corresponding  to SH771x
indicates the presence of TSU but the memory resource for it is absent.
Add the missing TSU resource  to both Ether devices and fix the harmless
off-by-one error in the main memory resources, while at it...

Fixes: 4986b99688 ("net: sh_eth: remove the SH_TSU_ADDR")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sergei Shtylyov 2018-01-06 21:53:27 +03:00 committed by David S. Miller
parent 195e2addbc
commit f9a531d673
2 changed files with 13 additions and 2 deletions
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14
arch/sh/boards/mach-se/770x/setup.c
View File

@ -124,10 +124,15 @@ static struct sh_eth_plat_data sh_eth_plat = {
static struct resource sh_eth0_resources[] = { static struct resource sh_eth0_resources[] = {
[0] = { [0] = {
.start = SH_ETH0_BASE, .start = SH_ETH0_BASE,
.end = SH_ETH0_BASE + 0x1B8, .end = SH_ETH0_BASE + 0x1B8 - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
.start = SH_TSU_BASE,
.end = SH_TSU_BASE + 0x200 - 1,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = SH_ETH0_IRQ, .start = SH_ETH0_IRQ,
.end = SH_ETH0_IRQ, .end = SH_ETH0_IRQ,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
@ -147,10 +152,15 @@ static struct platform_device sh_eth0_device = {
static struct resource sh_eth1_resources[] = { static struct resource sh_eth1_resources[] = {
[0] = { [0] = {
.start = SH_ETH1_BASE, .start = SH_ETH1_BASE,
.end = SH_ETH1_BASE + 0x1B8, .end = SH_ETH1_BASE + 0x1B8 - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
.start = SH_TSU_BASE,
.end = SH_TSU_BASE + 0x200 - 1,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = SH_ETH1_IRQ, .start = SH_ETH1_IRQ,
.end = SH_ETH1_IRQ, .end = SH_ETH1_IRQ,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,

1
arch/sh/include/mach-se/mach/se.h
View File

@ -100,6 +100,7 @@
/* Base address */ /* Base address */
#define SH_ETH0_BASE 0xA7000000 #define SH_ETH0_BASE 0xA7000000
#define SH_ETH1_BASE 0xA7000400 #define SH_ETH1_BASE 0xA7000400
#define SH_TSU_BASE 0xA7000800
/* PHY ID */ /* PHY ID */
#if defined(CONFIG_CPU_SUBTYPE_SH7710) #if defined(CONFIG_CPU_SUBTYPE_SH7710)
# define PHY_ID 0x00 # define PHY_ID 0x00