forked from luck/tmp_suning_uos_patched
KVM: x86/mmu: Optimize MMU page cache lookup for fully direct MMUs
Skip the unsync checks and the write flooding clearing for fully direct MMUs, which are guaranteed to not have unsync'd or indirect pages (write flooding detection only applies to indirect pages). For TDP, this avoids unnecessary memory reads and writes, and for the write flooding count will also avoid dirtying a cache line (unsync_child_bitmap itself consumes a cache line, i.e. write_flooding_count is guaranteed to be in a different cache line than parent_ptes). Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Message-Id: <20200623194027.23135-3-sean.j.christopherson@intel.com> Reviewed-By: Jon Cargille <jcargill@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -2460,6 +2460,7 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
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int direct,
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unsigned int access)
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{
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bool direct_mmu = vcpu->arch.mmu->direct_map;
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union kvm_mmu_page_role role;
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struct hlist_head *sp_list;
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unsigned quadrant;
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@ -2475,8 +2476,7 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
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if (role.direct)
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role.gpte_is_8_bytes = true;
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role.access = access;
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if (!vcpu->arch.mmu->direct_map
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&& vcpu->arch.mmu->root_level <= PT32_ROOT_LEVEL) {
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if (!direct_mmu && vcpu->arch.mmu->root_level <= PT32_ROOT_LEVEL) {
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quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
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quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
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role.quadrant = quadrant;
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@ -2495,6 +2495,9 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
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if (sp->role.word != role.word)
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continue;
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if (direct_mmu)
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goto trace_get_page;
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if (sp->unsync) {
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/* The page is good, but __kvm_sync_page might still end
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* up zapping it. If so, break in order to rebuild it.
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@ -2510,6 +2513,8 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
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kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
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__clear_sp_write_flooding_count(sp);
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trace_get_page:
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trace_kvm_mmu_get_page(sp, false);
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goto out;
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}
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