forked from luck/tmp_suning_uos_patched
iio: adc: sc27xx: Add raw data support
The headset device will use channel 20 of ADC controller to detect events, but it needs the raw ADC data to do conversion according to its own formula. Thus we should configure the channel mask separately and configure channel 20 as IIO_CHAN_INFO_RAW, as well as adding raw data read support. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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@ -273,6 +273,17 @@ static int sc27xx_adc_read_raw(struct iio_dev *indio_dev,
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int ret, tmp;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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mutex_lock(&indio_dev->mlock);
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ret = sc27xx_adc_read(data, chan->channel, scale, &tmp);
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mutex_unlock(&indio_dev->mlock);
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if (ret)
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return ret;
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*val = tmp;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_PROCESSED:
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mutex_lock(&indio_dev->mlock);
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ret = sc27xx_adc_read_processed(data, chan->channel, scale,
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@ -315,48 +326,47 @@ static const struct iio_info sc27xx_info = {
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.write_raw = &sc27xx_adc_write_raw,
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};
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#define SC27XX_ADC_CHANNEL(index) { \
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#define SC27XX_ADC_CHANNEL(index, mask) { \
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.type = IIO_VOLTAGE, \
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.channel = index, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) | \
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BIT(IIO_CHAN_INFO_SCALE), \
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.info_mask_separate = mask | BIT(IIO_CHAN_INFO_SCALE), \
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.datasheet_name = "CH##index", \
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.indexed = 1, \
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}
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static const struct iio_chan_spec sc27xx_channels[] = {
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SC27XX_ADC_CHANNEL(0),
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SC27XX_ADC_CHANNEL(1),
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SC27XX_ADC_CHANNEL(2),
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SC27XX_ADC_CHANNEL(3),
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SC27XX_ADC_CHANNEL(4),
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SC27XX_ADC_CHANNEL(5),
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SC27XX_ADC_CHANNEL(6),
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SC27XX_ADC_CHANNEL(7),
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SC27XX_ADC_CHANNEL(8),
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SC27XX_ADC_CHANNEL(9),
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SC27XX_ADC_CHANNEL(10),
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SC27XX_ADC_CHANNEL(11),
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SC27XX_ADC_CHANNEL(12),
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SC27XX_ADC_CHANNEL(13),
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SC27XX_ADC_CHANNEL(14),
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SC27XX_ADC_CHANNEL(15),
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SC27XX_ADC_CHANNEL(16),
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SC27XX_ADC_CHANNEL(17),
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SC27XX_ADC_CHANNEL(18),
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SC27XX_ADC_CHANNEL(19),
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SC27XX_ADC_CHANNEL(20),
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SC27XX_ADC_CHANNEL(21),
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SC27XX_ADC_CHANNEL(22),
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SC27XX_ADC_CHANNEL(23),
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SC27XX_ADC_CHANNEL(24),
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SC27XX_ADC_CHANNEL(25),
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SC27XX_ADC_CHANNEL(26),
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SC27XX_ADC_CHANNEL(27),
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SC27XX_ADC_CHANNEL(28),
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SC27XX_ADC_CHANNEL(29),
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SC27XX_ADC_CHANNEL(30),
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SC27XX_ADC_CHANNEL(31),
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SC27XX_ADC_CHANNEL(0, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(1, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(2, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(3, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(4, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(5, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(6, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(7, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(8, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(9, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(10, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(11, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(12, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(13, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(14, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(15, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(16, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(17, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(18, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(19, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(20, BIT(IIO_CHAN_INFO_RAW)),
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SC27XX_ADC_CHANNEL(21, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(22, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(23, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(24, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(25, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(26, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(27, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(28, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(29, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(30, BIT(IIO_CHAN_INFO_PROCESSED)),
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SC27XX_ADC_CHANNEL(31, BIT(IIO_CHAN_INFO_PROCESSED)),
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};
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static int sc27xx_adc_enable(struct sc27xx_adc_data *data)
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