forked from luck/tmp_suning_uos_patched
ps3: reduce allocation size of rx skb buffers
Reduced allocation size for rx skb buffers, from 2308 bytes to 1356 per buffer. Signed-off-by: Masakazu Mokuno <mokuno@sm.sony.co.jp> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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@ -917,31 +917,60 @@ static int gelic_net_decode_one_descr(struct gelic_net_card *card)
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goto refill;
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}
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if ((status != GELIC_NET_DESCR_COMPLETE) &&
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(status != GELIC_NET_DESCR_FRAME_END)) {
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if (status == GELIC_NET_DESCR_BUFFER_FULL) {
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/*
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* Buffer full would occur if and only if
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* the frame length was longer than the size of this
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* descriptor's buffer. If the frame length was equal
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* to or shorter than buffer'size, FRAME_END condition
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* would occur.
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* Anyway this frame was longer than the MTU,
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* just drop it.
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*/
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dev_info(ctodev(card), "overlength frame\n");
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goto refill;
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}
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/*
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* descriptoers any other than FRAME_END here should
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* be treated as error.
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*/
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if (status != GELIC_NET_DESCR_FRAME_END) {
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dev_dbg(ctodev(card), "RX descriptor with state %x\n",
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status);
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goto refill;
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}
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/* ok, we've got a packet in descr */
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gelic_net_pass_skb_up(descr, card); /* 1: skb_up sccess */
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gelic_net_pass_skb_up(descr, card);
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refill:
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descr->next_descr_addr = 0; /* unlink the descr */
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/*
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* So that always DMAC can see the end
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* of the descriptor chain to avoid
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* from unwanted DMAC overrun.
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*/
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descr->next_descr_addr = 0;
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/* change the descriptor state: */
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gelic_net_set_descr_status(descr, GELIC_NET_DESCR_NOT_IN_USE);
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/* refill one desc
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* FIXME: this can fail, but for now, just leave this
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* descriptor without skb
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/*
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* this call can fail, but for now, just leave this
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* decriptor without skb
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*/
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gelic_net_prepare_rx_descr(card, descr);
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chain->head = descr;
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chain->tail = descr->next;
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/*
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* Set this descriptor the end of the chain.
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*/
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descr->prev->next_descr_addr = descr->bus_addr;
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/*
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* If dmac chain was met, DMAC stopped.
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* thus re-enable it
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*/
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if (dmac_chain_ended) {
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card->rx_dma_restart_required = 1;
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dev_dbg(ctodev(card), "reenable rx dma scheduled\n");
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@ -32,8 +32,8 @@
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#define GELIC_NET_RX_DESCRIPTORS 128 /* num of descriptors */
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#define GELIC_NET_TX_DESCRIPTORS 128 /* num of descriptors */
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#define GELIC_NET_MAX_MTU 2308
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#define GELIC_NET_MIN_MTU 64
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#define GELIC_NET_MAX_MTU VLAN_ETH_FRAME_LEN
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#define GELIC_NET_MIN_MTU VLAN_ETH_ZLEN
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#define GELIC_NET_RXBUF_ALIGN 128
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#define GELIC_NET_RX_CSUM_DEFAULT 1 /* hw chksum */
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#define GELIC_NET_WATCHDOG_TIMEOUT 5*HZ
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@ -81,7 +81,8 @@ enum gelic_net_int1_status {
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*/
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#define GELIC_NET_RXVLNPKT 0x00200000 /* VLAN packet */
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/* bit 20..16 reserved */
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#define GELIC_NET_RXRECNUM 0x0000ff00 /* reception receipt number */
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#define GELIC_NET_RXRRECNUM 0x0000ff00 /* reception receipt number */
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#define GELIC_NET_RXRRECNUM_SHIFT 8
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/* bit 7..0 reserved */
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#define GELIC_NET_TXDESC_TAIL 0
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@ -129,13 +130,14 @@ enum gelic_net_int1_status {
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enum gelic_net_descr_status {
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GELIC_NET_DESCR_COMPLETE = 0x00, /* used in rx and tx */
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GELIC_NET_DESCR_COMPLETE = 0x00, /* used in tx */
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GELIC_NET_DESCR_BUFFER_FULL = 0x00, /* used in rx */
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GELIC_NET_DESCR_RESPONSE_ERROR = 0x01, /* used in rx and tx */
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GELIC_NET_DESCR_PROTECTION_ERROR = 0x02, /* used in rx and tx */
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GELIC_NET_DESCR_FRAME_END = 0x04, /* used in rx */
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GELIC_NET_DESCR_FORCE_END = 0x05, /* used in rx and tx */
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GELIC_NET_DESCR_CARDOWNED = 0x0a, /* used in rx and tx */
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GELIC_NET_DESCR_NOT_IN_USE /* any other value */
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GELIC_NET_DESCR_NOT_IN_USE = 0x0b /* any other value */
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};
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/* for lv1_net_control */
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#define GELIC_NET_GET_MAC_ADDRESS 0x0000000000000001
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