forked from luck/tmp_suning_uos_patched
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: lantiq: use export.h in favour of module.h MAINTAINERS: The MIPS git tree has moved. MIPS: Fix build error due to missing inclusion of <linux/export.h>. MIPS: ASID conflict after CPU hotplug MIPS: Octeon: Fix compile error in arch/mips/cavium-octeon/flash_setup.c MIPS: errloongson2_clock: Fix build error by including linux/module.h STAGING: octeon-ethernet: Fix compile error caused by skb_frag_struct change MIPS: Hook up process_vm_readv and process_vm_writev system calls. MIPS: Kernel hangs occasionally during boot. MIPS: Octeon: Mark SMP-IPI interrupt as IRQF_NO_THREAD MIPS: BCM47xx: fix build with GENERIC_GPIO configuration MIPS: NXP: Remove unused source files. MIPS: Yosemite, Emma: Fix off-by-two in arcs_cmdline buffer size check
This commit is contained in:
Linus Torvalds
commit
ff0ff78068
|
|
@ -4339,7 +4339,7 @@ MIPS
|
|||
M: Ralf Baechle <ralf@linux-mips.org>
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||||
L: linux-mips@linux-mips.org
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||||
W: http://www.linux-mips.org/
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||||
T: git git://git.linux-mips.org/pub/scm/linux.git
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||||
T: git git://git.linux-mips.org/pub/scm/ralf/linux.git
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||||
Q: http://patchwork.linux-mips.org/project/linux-mips/list/
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S: Supported
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||||
F: Documentation/mips/
|
||||
|
|
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|||
|
|
@ -17,8 +17,6 @@
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static struct map_info flash_map;
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static struct mtd_info *mymtd;
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static int nr_parts;
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static struct mtd_partition *parts;
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static const char *part_probe_types[] = {
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"cmdlinepart",
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#ifdef CONFIG_MTD_REDBOOT_PARTS
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|
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@ -61,11 +59,8 @@ static int __init flash_init(void)
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mymtd = do_map_probe("cfi_probe", &flash_map);
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if (mymtd) {
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mymtd->owner = THIS_MODULE;
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nr_parts = parse_mtd_partitions(mymtd,
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part_probe_types,
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&parts, 0);
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mtd_device_register(mymtd, parts, nr_parts);
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mtd_device_parse_register(mymtd, part_probe_types,
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0, NULL, 0);
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} else {
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pr_err("Failed to register MTD device for flash\n");
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}
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|
|
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|
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@ -207,8 +207,9 @@ void octeon_prepare_cpus(unsigned int max_cpus)
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* the other bits alone.
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*/
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cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffff);
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if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_DISABLED,
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"SMP-IPI", mailbox_interrupt)) {
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if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt,
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IRQF_PERCPU | IRQF_NO_THREAD, "SMP-IPI",
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mailbox_interrupt)) {
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panic("Cannot request_irq(OCTEON_IRQ_MBOX0)\n");
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}
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}
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|
|
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@ -50,7 +50,7 @@ void __init prom_init(void)
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/* arg[0] is "g", the rest is boot parameters */
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for (i = 1; i < argc; i++) {
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if (strlen(arcs_cmdline) + strlen(arg[i] + 1)
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if (strlen(arcs_cmdline) + strlen(arg[i]) + 1
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>= sizeof(arcs_cmdline))
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break;
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strcat(arcs_cmdline, arg[i]);
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|
|
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|
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@ -36,6 +36,8 @@ static inline int gpio_get_value(unsigned gpio)
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return -EINVAL;
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}
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#define gpio_get_value_cansleep gpio_get_value
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static inline void gpio_set_value(unsigned gpio, int value)
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{
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switch (bcm47xx_bus_type) {
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|
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@ -54,6 +56,19 @@ static inline void gpio_set_value(unsigned gpio, int value)
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}
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}
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#define gpio_set_value_cansleep gpio_set_value
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static inline int gpio_cansleep(unsigned gpio)
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{
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return 0;
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}
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static inline int gpio_is_valid(unsigned gpio)
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{
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return gpio < (BCM47XX_EXTIF_GPIO_LINES + BCM47XX_CHIPCO_GPIO_LINES);
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}
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|
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static inline int gpio_direction_input(unsigned gpio)
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{
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switch (bcm47xx_bus_type) {
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|
|
@ -137,7 +152,4 @@ static inline int gpio_polarity(unsigned gpio, int value)
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}
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/* cansleep wrappers */
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#include <asm-generic/gpio.h>
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|
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#endif /* __BCM47XX_GPIO_H */
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||||
|
|
|
|||
|
|
@ -365,16 +365,18 @@
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|||
#define __NR_syncfs (__NR_Linux + 342)
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#define __NR_sendmmsg (__NR_Linux + 343)
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#define __NR_setns (__NR_Linux + 344)
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||||
#define __NR_process_vm_readv (__NR_Linux + 345)
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#define __NR_process_vm_writev (__NR_Linux + 346)
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||||
|
||||
/*
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* Offset of the last Linux o32 flavoured syscall
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||||
*/
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#define __NR_Linux_syscalls 344
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#define __NR_Linux_syscalls 346
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|
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#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
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#define __NR_O32_Linux 4000
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#define __NR_O32_Linux_syscalls 344
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#define __NR_O32_Linux_syscalls 346
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|
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#if _MIPS_SIM == _MIPS_SIM_ABI64
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|
|
@ -686,16 +688,18 @@
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#define __NR_syncfs (__NR_Linux + 301)
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#define __NR_sendmmsg (__NR_Linux + 302)
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#define __NR_setns (__NR_Linux + 303)
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#define __NR_process_vm_readv (__NR_Linux + 304)
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#define __NR_process_vm_writev (__NR_Linux + 305)
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|
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/*
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* Offset of the last Linux 64-bit flavoured syscall
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*/
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||||
#define __NR_Linux_syscalls 303
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||||
#define __NR_Linux_syscalls 305
|
||||
|
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#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
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||||
|
||||
#define __NR_64_Linux 5000
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||||
#define __NR_64_Linux_syscalls 303
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#define __NR_64_Linux_syscalls 305
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||||
|
||||
#if _MIPS_SIM == _MIPS_SIM_NABI32
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||||
|
||||
|
|
@ -1012,16 +1016,18 @@
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#define __NR_syncfs (__NR_Linux + 306)
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#define __NR_sendmmsg (__NR_Linux + 307)
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#define __NR_setns (__NR_Linux + 308)
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||||
#define __NR_process_vm_readv (__NR_Linux + 309)
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#define __NR_process_vm_writev (__NR_Linux + 310)
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||||
|
||||
/*
|
||||
* Offset of the last N32 flavoured syscall
|
||||
*/
|
||||
#define __NR_Linux_syscalls 308
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||||
#define __NR_Linux_syscalls 310
|
||||
|
||||
#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
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||||
|
||||
#define __NR_N32_Linux 6000
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||||
#define __NR_N32_Linux_syscalls 308
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||||
#define __NR_N32_Linux_syscalls 310
|
||||
|
||||
#ifdef __KERNEL__
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|
|
|
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|
|
@ -103,19 +103,10 @@ static int c0_compare_int_pending(void)
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|
||||
/*
|
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* Compare interrupt can be routed and latched outside the core,
|
||||
* so a single execution hazard barrier may not be enough to give
|
||||
* it time to clear as seen in the Cause register. 4 time the
|
||||
* pipeline depth seems reasonably conservative, and empirically
|
||||
* works better in configurations with high CPU/bus clock ratios.
|
||||
* so wait up to worst case number of cycle counter ticks for timer interrupt
|
||||
* changes to propagate to the cause register.
|
||||
*/
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||||
|
||||
#define compare_change_hazard() \
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do { \
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irq_disable_hazard(); \
|
||||
irq_disable_hazard(); \
|
||||
irq_disable_hazard(); \
|
||||
irq_disable_hazard(); \
|
||||
} while (0)
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#define COMPARE_INT_SEEN_TICKS 50
|
||||
|
||||
int c0_compare_int_usable(void)
|
||||
{
|
||||
|
|
@ -126,8 +117,12 @@ int c0_compare_int_usable(void)
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|||
* IP7 already pending? Try to clear it by acking the timer.
|
||||
*/
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if (c0_compare_int_pending()) {
|
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write_c0_compare(read_c0_count());
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compare_change_hazard();
|
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cnt = read_c0_count();
|
||||
write_c0_compare(cnt);
|
||||
back_to_back_c0_hazard();
|
||||
while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
|
||||
if (!c0_compare_int_pending())
|
||||
break;
|
||||
if (c0_compare_int_pending())
|
||||
return 0;
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||||
}
|
||||
|
|
@ -136,7 +131,7 @@ int c0_compare_int_usable(void)
|
|||
cnt = read_c0_count();
|
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cnt += delta;
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write_c0_compare(cnt);
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compare_change_hazard();
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back_to_back_c0_hazard();
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if ((int)(read_c0_count() - cnt) < 0)
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break;
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/* increase delta if the timer was already expired */
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|
|
@ -145,12 +140,17 @@ int c0_compare_int_usable(void)
|
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while ((int)(read_c0_count() - cnt) <= 0)
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; /* Wait for expiry */
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|
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compare_change_hazard();
|
||||
while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
|
||||
if (c0_compare_int_pending())
|
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break;
|
||||
if (!c0_compare_int_pending())
|
||||
return 0;
|
||||
|
||||
write_c0_compare(read_c0_count());
|
||||
compare_change_hazard();
|
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cnt = read_c0_count();
|
||||
write_c0_compare(cnt);
|
||||
back_to_back_c0_hazard();
|
||||
while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
|
||||
if (!c0_compare_int_pending())
|
||||
break;
|
||||
if (c0_compare_int_pending())
|
||||
return 0;
|
||||
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@
|
|||
* for more details.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/cpufreq.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -591,6 +591,8 @@ einval: li v0, -ENOSYS
|
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sys sys_syncfs 1
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sys sys_sendmmsg 4
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sys sys_setns 2
|
||||
sys sys_process_vm_readv 6 /* 4345 */
|
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sys sys_process_vm_writev 6
|
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.endm
|
||||
|
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/* We pre-compute the number of _instruction_ bytes needed to
|
||||
|
|
|
|||
|
|
@ -430,4 +430,6 @@ sys_call_table:
|
|||
PTR sys_syncfs
|
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PTR sys_sendmmsg
|
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PTR sys_setns
|
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PTR sys_process_vm_readv
|
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PTR sys_process_vm_writev /* 5305 */
|
||||
.size sys_call_table,.-sys_call_table
|
||||
|
|
|
|||
|
|
@ -430,4 +430,6 @@ EXPORT(sysn32_call_table)
|
|||
PTR sys_syncfs
|
||||
PTR compat_sys_sendmmsg
|
||||
PTR sys_setns
|
||||
PTR compat_sys_process_vm_readv
|
||||
PTR compat_sys_process_vm_writev /* 6310 */
|
||||
.size sysn32_call_table,.-sysn32_call_table
|
||||
|
|
|
|||
|
|
@ -548,4 +548,6 @@ sys_call_table:
|
|||
PTR sys_syncfs
|
||||
PTR compat_sys_sendmmsg
|
||||
PTR sys_setns
|
||||
PTR compat_sys_process_vm_readv /* 4345 */
|
||||
PTR compat_sys_process_vm_writev
|
||||
.size sys_call_table,.-sys_call_table
|
||||
|
|
|
|||
|
|
@ -1596,7 +1596,8 @@ void __cpuinit per_cpu_trap_init(void)
|
|||
}
|
||||
#endif /* CONFIG_MIPS_MT_SMTC */
|
||||
|
||||
cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
|
||||
if (!cpu_data[cpu].asid_cache)
|
||||
cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
|
||||
|
||||
atomic_inc(&init_mm.mm_count);
|
||||
current->active_mm = &init_mm;
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
* Copyright (C) 2010 John Crispin <blogic@openwrt.org>
|
||||
*/
|
||||
#include <linux/io.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/kernel.h>
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
* Copyright (C) 2010 John Crispin <blogic@openwrt.org>
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/clk.h>
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/time.h>
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <asm/bootinfo.h>
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/io.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/clk.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/io.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/clk.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
|
|
|
|||
|
|
@ -19,6 +19,7 @@
|
|||
#include <linux/platform_device.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/export.h>
|
||||
|
||||
#include <lantiq_soc.h>
|
||||
#include <xway_dma.h>
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/slab.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/ioport.h>
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mutex.h>
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@
|
|||
|
||||
#include <linux/slab.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mutex.h>
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
* Copyright (C) 2010 John Crispin <blogic@openwrt.org>
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/clk.h>
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/time.h>
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
* Copyright (C) 2010 John Crispin <blogic@openwrt.org>
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/clk.h>
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/time.h>
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@
|
|||
#include <linux/io.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/pm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/export.h>
|
||||
#include <asm/reboot.h>
|
||||
|
||||
#include <lantiq_soc.h>
|
||||
|
|
|
|||
|
|
@ -1,134 +0,0 @@
|
|||
/*
|
||||
*
|
||||
* BRIEF MODULE DESCRIPTION
|
||||
*
|
||||
* Author: source@mvista.com
|
||||
*
|
||||
* This program is free software; you can distribute it and/or modify it
|
||||
* under the terms of the GNU General Public License (Version 2) as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
|
||||
*/
|
||||
#include <linux/types.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
#include <pci.h>
|
||||
#include <glb.h>
|
||||
#include <nand.h>
|
||||
|
||||
static struct resource pci_io_resource = {
|
||||
.start = PNX8550_PCIIO + 0x1000, /* reserve regacy I/O space */
|
||||
.end = PNX8550_PCIIO + PNX8550_PCIIO_SIZE,
|
||||
.name = "pci IO space",
|
||||
.flags = IORESOURCE_IO
|
||||
};
|
||||
|
||||
static struct resource pci_mem_resource = {
|
||||
.start = PNX8550_PCIMEM,
|
||||
.end = PNX8550_PCIMEM + PNX8550_PCIMEM_SIZE - 1,
|
||||
.name = "pci memory space",
|
||||
.flags = IORESOURCE_MEM
|
||||
};
|
||||
|
||||
extern struct pci_ops pnx8550_pci_ops;
|
||||
|
||||
static struct pci_controller pnx8550_controller = {
|
||||
.pci_ops = &pnx8550_pci_ops,
|
||||
.io_map_base = PNX8550_PORT_BASE,
|
||||
.io_resource = &pci_io_resource,
|
||||
.mem_resource = &pci_mem_resource,
|
||||
};
|
||||
|
||||
/* Return the total size of DRAM-memory, (RANK0 + RANK1) */
|
||||
static inline unsigned long get_system_mem_size(void)
|
||||
{
|
||||
/* Read IP2031_RANK0_ADDR_LO */
|
||||
unsigned long dram_r0_lo = inl(PCI_BASE | 0x65010);
|
||||
/* Read IP2031_RANK1_ADDR_HI */
|
||||
unsigned long dram_r1_hi = inl(PCI_BASE | 0x65018);
|
||||
|
||||
return dram_r1_hi - dram_r0_lo + 1;
|
||||
}
|
||||
|
||||
static int __init pnx8550_pci_setup(void)
|
||||
{
|
||||
int pci_mem_code;
|
||||
int mem_size = get_system_mem_size() >> 20;
|
||||
|
||||
/* Clear the Global 2 Register, PCI Inta Output Enable Registers
|
||||
Bit 1:Enable DAC Powerdown
|
||||
-> 0:DACs are enabled and are working normally
|
||||
1:DACs are powerdown
|
||||
Bit 0:Enable of PCI inta output
|
||||
-> 0 = Disable PCI inta output
|
||||
1 = Enable PCI inta output
|
||||
*/
|
||||
PNX8550_GLB2_ENAB_INTA_O = 0;
|
||||
|
||||
/* Calc the PCI mem size code */
|
||||
if (mem_size >= 128)
|
||||
pci_mem_code = SIZE_128M;
|
||||
else if (mem_size >= 64)
|
||||
pci_mem_code = SIZE_64M;
|
||||
else if (mem_size >= 32)
|
||||
pci_mem_code = SIZE_32M;
|
||||
else
|
||||
pci_mem_code = SIZE_16M;
|
||||
|
||||
/* Set PCI_XIO registers */
|
||||
outl(pci_mem_resource.start, PCI_BASE | PCI_BASE1_LO);
|
||||
outl(pci_mem_resource.end + 1, PCI_BASE | PCI_BASE1_HI);
|
||||
outl(pci_io_resource.start, PCI_BASE | PCI_BASE2_LO);
|
||||
outl(pci_io_resource.end, PCI_BASE | PCI_BASE2_HI);
|
||||
|
||||
/* Send memory transaction via PCI_BASE2 */
|
||||
outl(0x00000001, PCI_BASE | PCI_IO);
|
||||
|
||||
/* Unlock the setup register */
|
||||
outl(0xca, PCI_BASE | PCI_UNLOCKREG);
|
||||
|
||||
/*
|
||||
* BAR0 of PNX8550 (pci base 10) must be zero in order for ide
|
||||
* to work, and in order for bus_to_baddr to work without any
|
||||
* hacks.
|
||||
*/
|
||||
outl(0x00000000, PCI_BASE | PCI_BASE10);
|
||||
|
||||
/*
|
||||
*These two bars are set by default or the boot code.
|
||||
* However, it's safer to set them here so we're not boot
|
||||
* code dependent.
|
||||
*/
|
||||
outl(0x1be00000, PCI_BASE | PCI_BASE14); /* PNX MMIO */
|
||||
outl(PNX8550_NAND_BASE_ADDR, PCI_BASE | PCI_BASE18); /* XIO */
|
||||
|
||||
outl(PCI_EN_TA |
|
||||
PCI_EN_PCI2MMI |
|
||||
PCI_EN_XIO |
|
||||
PCI_SETUP_BASE18_SIZE(SIZE_32M) |
|
||||
PCI_SETUP_BASE18_EN |
|
||||
PCI_SETUP_BASE14_EN |
|
||||
PCI_SETUP_BASE10_PREF |
|
||||
PCI_SETUP_BASE10_SIZE(pci_mem_code) |
|
||||
PCI_SETUP_CFGMANAGE_EN |
|
||||
PCI_SETUP_PCIARB_EN,
|
||||
PCI_BASE |
|
||||
PCI_SETUP); /* PCI_SETUP */
|
||||
outl(0x00000000, PCI_BASE | PCI_CTRL); /* PCI_CONTROL */
|
||||
|
||||
register_pci_controller(&pnx8550_controller);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
arch_initcall(pnx8550_pci_setup);
|
||||
|
|
@ -1,143 +0,0 @@
|
|||
/*
|
||||
*
|
||||
* 2.6 port, Embedded Alley Solutions, Inc
|
||||
*
|
||||
* Based on Per Hallsmark, per.hallsmark@mvista.com
|
||||
*
|
||||
* This program is free software; you can distribute it and/or modify it
|
||||
* under the terms of the GNU General Public License (Version 2) as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/serial_pnx8xxx.h>
|
||||
#include <linux/pm.h>
|
||||
|
||||
#include <asm/cpu.h>
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mipsregs.h>
|
||||
#include <asm/reboot.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/time.h>
|
||||
|
||||
#include <glb.h>
|
||||
#include <int.h>
|
||||
#include <pci.h>
|
||||
#include <uart.h>
|
||||
#include <nand.h>
|
||||
|
||||
extern void __init board_setup(void);
|
||||
extern void pnx8550_machine_restart(char *);
|
||||
extern void pnx8550_machine_halt(void);
|
||||
extern void pnx8550_machine_power_off(void);
|
||||
extern struct resource ioport_resource;
|
||||
extern struct resource iomem_resource;
|
||||
extern char *prom_getcmdline(void);
|
||||
|
||||
struct resource standard_io_resources[] = {
|
||||
{
|
||||
.start = 0x00,
|
||||
.end = 0x1f,
|
||||
.name = "dma1",
|
||||
.flags = IORESOURCE_BUSY
|
||||
}, {
|
||||
.start = 0x40,
|
||||
.end = 0x5f,
|
||||
.name = "timer",
|
||||
.flags = IORESOURCE_BUSY
|
||||
}, {
|
||||
.start = 0x80,
|
||||
.end = 0x8f,
|
||||
.name = "dma page reg",
|
||||
.flags = IORESOURCE_BUSY
|
||||
}, {
|
||||
.start = 0xc0,
|
||||
.end = 0xdf,
|
||||
.name = "dma2",
|
||||
.flags = IORESOURCE_BUSY
|
||||
},
|
||||
};
|
||||
|
||||
#define STANDARD_IO_RESOURCES ARRAY_SIZE(standard_io_resources)
|
||||
|
||||
extern struct resource pci_io_resource;
|
||||
extern struct resource pci_mem_resource;
|
||||
|
||||
/* Return the total size of DRAM-memory, (RANK0 + RANK1) */
|
||||
unsigned long get_system_mem_size(void)
|
||||
{
|
||||
/* Read IP2031_RANK0_ADDR_LO */
|
||||
unsigned long dram_r0_lo = inl(PCI_BASE | 0x65010);
|
||||
/* Read IP2031_RANK1_ADDR_HI */
|
||||
unsigned long dram_r1_hi = inl(PCI_BASE | 0x65018);
|
||||
|
||||
return dram_r1_hi - dram_r0_lo + 1;
|
||||
}
|
||||
|
||||
int pnx8550_console_port = -1;
|
||||
|
||||
void __init plat_mem_setup(void)
|
||||
{
|
||||
int i;
|
||||
char* argptr;
|
||||
|
||||
board_setup(); /* board specific setup */
|
||||
|
||||
_machine_restart = pnx8550_machine_restart;
|
||||
_machine_halt = pnx8550_machine_halt;
|
||||
pm_power_off = pnx8550_machine_power_off;
|
||||
|
||||
/* Clear the Global 2 Register, PCI Inta Output Enable Registers
|
||||
Bit 1:Enable DAC Powerdown
|
||||
-> 0:DACs are enabled and are working normally
|
||||
1:DACs are powerdown
|
||||
Bit 0:Enable of PCI inta output
|
||||
-> 0 = Disable PCI inta output
|
||||
1 = Enable PCI inta output
|
||||
*/
|
||||
PNX8550_GLB2_ENAB_INTA_O = 0;
|
||||
|
||||
/* IO/MEM resources. */
|
||||
set_io_port_base(PNX8550_PORT_BASE);
|
||||
ioport_resource.start = 0;
|
||||
ioport_resource.end = ~0;
|
||||
iomem_resource.start = 0;
|
||||
iomem_resource.end = ~0;
|
||||
|
||||
/* Request I/O space for devices on this board */
|
||||
for (i = 0; i < STANDARD_IO_RESOURCES; i++)
|
||||
request_resource(&ioport_resource, standard_io_resources + i);
|
||||
|
||||
/* Place the Mode Control bit for GPIO pin 16 in primary function */
|
||||
/* Pin 16 is used by UART1, UA1_TX */
|
||||
outl((PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_16_BIT) |
|
||||
(PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_17_BIT),
|
||||
PNX8550_GPIO_MC1);
|
||||
|
||||
argptr = prom_getcmdline();
|
||||
if ((argptr = strstr(argptr, "console=ttyS")) != NULL) {
|
||||
argptr += strlen("console=ttyS");
|
||||
pnx8550_console_port = *argptr == '0' ? 0 : 1;
|
||||
|
||||
/* We must initialize the UART (console) before early printk */
|
||||
/* Set LCR to 8-bit and BAUD to 38400 (no 5) */
|
||||
ip3106_lcr(UART_BASE, pnx8550_console_port) =
|
||||
PNX8XXX_UART_LCR_8BIT;
|
||||
ip3106_baud(UART_BASE, pnx8550_console_port) = 5;
|
||||
}
|
||||
}
|
||||
|
|
@ -7,6 +7,7 @@
|
|||
* Support for all devices (greater than 16) added by David Gathright.
|
||||
*/
|
||||
|
||||
#include <linux/export.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
|
|
|||
|
|
@ -13,6 +13,7 @@
|
|||
#include <linux/delay.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/vmalloc.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include <asm/pci.h>
|
||||
|
|
|
|||
|
|
@ -102,7 +102,7 @@ void __init prom_init(void)
|
|||
|
||||
/* Get the boot parameters */
|
||||
for (i = 1; i < argc; i++) {
|
||||
if (strlen(arcs_cmdline) + strlen(arg[i] + 1) >=
|
||||
if (strlen(arcs_cmdline) + strlen(arg[i]) + 1 >=
|
||||
sizeof(arcs_cmdline))
|
||||
break;
|
||||
|
||||
|
|
|
|||
|
|
@ -275,7 +275,7 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev)
|
|||
CVM_OCT_SKB_CB(skb)[0] = hw_buffer.u64;
|
||||
for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
|
||||
struct skb_frag_struct *fs = skb_shinfo(skb)->frags + i;
|
||||
hw_buffer.s.addr = XKPHYS_TO_PHYS((u64)(page_address(fs->page) + fs->page_offset));
|
||||
hw_buffer.s.addr = XKPHYS_TO_PHYS((u64)(page_address(fs->page.p) + fs->page_offset));
|
||||
hw_buffer.s.size = fs->size;
|
||||
CVM_OCT_SKB_CB(skb)[i + 1] = hw_buffer.u64;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user