Patch from Nicolas Pitre
According to the Intel PXA27x Processor Family Specification
Update document (doc.nr. 280071-009) erratum E7, some care must be taken
to locate the disabling and re-enabling of the MMU to the beginning of a
cache line to avoid problems in some circumstances.
Credits to Simon Vogl <simon.vogl@researchstudios.at> for bringing this
up.
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Lennert Buytenhek
Analogous to the previous patch that allows ioremap() to use section
mappings, this patch allows ioremap() to use supersection mappings.
Original patch by Deepak Saxena.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Lennert Buytenhek
This patch makes the iWMMXt context switch hook use the generic
thread notifier infrastructure that was recently merged in commit
d6551e884c.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Lennert Buytenhek
This patch adds support for the Cirrus Logic EDB9315A, an evaluation
board based on the Cirrus Logic EP9315 SoC, with 64M RAM, two USB host
ports, audio in/out, three serial ports, 10/100 ethernet, and IDE, VGA,
and LCD interfaces.
The EDB9315A is a low-cost version of the EDB9315, and has only 16M
of NOR flash, while the EDB9315 has 32M.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Martin Michlmayr
Some cosmetic changes to increase the consistency of the IOP Kconfig file. Change some space into tabs and add a dot at the end of a help description.
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Martin Michlmayr
Add a brief help description for ARCH_EP80219.
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Tony Lindgren
This patch makes OMAP MMC work again:
- Fix compile errors
- Do not ioremap base as it is already statically mapped
- Clean-up platform device handling
- Fix compile warnings
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Tony Lindgren
Update OMAP H2 defconfig and leave out hw random for now until
it's been updated.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Tony Lindgren
Fixes compilation errors on OMAP1. Patch from Timo Teras.
Signed-off-by: Timo Teras <timo.teras@solidboot.com>
Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Allow section mappings to be setup using ioremap() and torn down
with iounmap(). This requires additional support in the MM
context switch to ensure that mappings are properly synchronised
when mapped in.
Based an original implementation by Deepak Saxena, reworked and
ARMv6 support added by rmk.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid folk having to edit cpu-sa1110.c to select their RAM type;
instead, allow the SDRAM type to be selected via the kernel
command line.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
On some CPUs, bit 4 of section mappings means "update the
cache when written to". On others, this bit is required to
be one, and others it's required to be zero. Finally, on
ARMv6 and above, setting it turns on "no execute" and prevents
speculative prefetches.
With all these combinations, no one value fits all CPUs, so we
have to pick a value depending on the CPU type, and the area
we're mapping.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Jürgen Schindele
This patch adds support for Trizeps4 SoM and ConXS-evalboard
from "Keith und Koep" This DIMM-module is based on PXA270.
Signed-off-by: Jürgen Schindele <linux@schindele.name>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Andrew Victor
This prepares the way for adding support for the new Atmel AT91SAM926x
processors.
Major changes:
- Rename time.c to at91rm9200_time.c
- Rename common.c to at91rm9200.c
- Introduce ARCH_AT91, of which ARCH_AT91RM9200, ARCH_AT91SAM9260 and
ARCH_AT91SAM9261 are dependent.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Lennert Buytenhek
This patch adds support for the Cirrus Logic EDB9302, an evaluation
board based on the Cirrus Logic EP9302 SoC, with 32M RAM, one USB host
port, audio in/out, two serial ports and a 10/100 ethernet interface.
George Kashperko submitted the original patch, this patch is a rewrite
using the newer physmap platform driver.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Lennert Buytenhek
The bootloader on the LogicPD PXA270 platform informs the kernel of
which type of TFT screen is connected via an lcd=$FOO kernel command
line parameter.
Before this patch, we ignored this parameter and just hardcoded the use
of the Sharp lq64d343 display kit. This patch implement parsing of the
command line option, and chooses the right pxafb_mach_info to use (six
choices) based on this command line option.
Also fix the fb settings to correspond with those of the bootloader.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Most MMU-based CPUs have a restriction on the setting of the data cache
enable and mmu enable bits in the control register, whereby if the data
cache is enabled, the MMU must also be enabled. Enabling the data
cache without the MMU is an invalid combination.
However, there are CPUs where the data cache can be enabled without the
MMU.
In order to allow these CPUs to take advantage of that, provide a
method whereby each proc-*.S file defines the control regsiter value
for use with nommu (with the MMU disabled.) Later on, when we add
support for enabling the MMU on these devices, we can adjust the
"crval" macro to also enable the data cache for nommu.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The "id(wb)BRR" suffix reports which CPU debugging options were (or
were not) selected at kernel build time. Rather than have every
proc-*.S file implement this, report the control register value,
from which this information can be deduced.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* 'nommu' of master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] nommu: backtrace code must not reference a discarded section
[ARM] nommu: Initial uCLinux support for MMU-based CPUs
[ARM] nommu: prevent Xscale-based machines being selected
[ARM] nommu: export flush_dcache_page()
[ARM] nommu: remove fault-armv, mmap and mm-armv files from nommu build
[ARM] Remove TABLE_SIZE, and several unused function prototypes
[ARM] nommu: Provide a simple flush_dcache_page implementation
[ARM] nommu: add arch/arm/Kconfig-nommu to Kconfig files
[ARM] nommu: add stubs for ioremap and friends
[ARM] nommu: avoid selecting TLB and CPU specific copy code
[ARM] nommu: uaccess tweaks
[ARM] nommu: adjust headers for !MMU ARM systems
[ARM] nommu: we need the TLS register emulation for nommu mode
Remove the hard coded ROM region setups. Use Kconfig options to specify
these in a generic way for platorms that want them.
This builds on top of the other recent m68knommu linker script changes
to completely remove fixed board configurations.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Use Kconfig options to setup the optional ROM region used on some
platforms. We used to define this in the linker script on a per
board basis. The configure options are more flexible and clean up
the linker script a lot.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Fix 68EZ328/config.c asm to be clean for new gcc versions.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Fix 68VZ328/config.c asm to be clean for new gcc versions.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Fix 68360/config.c asm to be clean for new gcc versions.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
The irqnode_t struct has moved to irqnode.h, need to include that
68360 ints.c.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Conditionaly compile the 68328 romvec code based on the ROM configuration
being enabled.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Remove the inline 68328 romvec section asm code into its own file.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Create the 68328 romvec section in its own assembler file. It can be
compiled in when required.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:
[IA64-SGI] fix prom revision checks in SN kernel
[IA64] tiger_defconfig s/NR_CPUS=4/NR_CPUS=16/
[IA64-SGI] - Pass OS logical cpu number to the SN prom (bios)
[IA64] palinfo.c: s/register_cpu_notifier/register_hotcpu_notifier/
Fix a erroneous calculation of the legacy brightness values as reported by
Paul Collins. Additionally, it moves the calculation of the negative value
in the radeonfb driver after the value check.
Signed-off-by: Michael Hanselmann <linux-kernel@hansmi.ch>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Paul Collins <paul@briny.ondioline.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
We recently changed x86 to handle more than 256 IRQs. Add a check in do_IRQ()
just to make sure that nothing went wrong with that implementation.
[chrisw@sous-sol.org: do x86_64 too]
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Andi Kleen <ak@muc.de>
Cc: Chris Wright <chrisw@sous-sol.org>
Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com>
Cc: <Christian.Limpach@cl.cam.ac.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
the VDSO randomization code on i386 fails to release the mmap semaphore
if insert_vm_struct() fails.
[ Made the conditional unlikely. -- Linus ]
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
The following patch fixes two spots in the SN kernel
that check a fixed prom revision number to determine prom
feature support. These checks are only valid on shub1 systems.
They are invalid on shub2 systems which have a different prom
with different revision numbers.
Signed-off-by: Aaron Young <ayoung@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
The code in "1007:" is in the .fixup section, which in the mmuless
case is discarded. Since this code is referenced from the .text
section, it causes an link error. Move this code into the .text
section instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
In noMMU mode, various of functions which are defined in mm/proc-*.S
is not valid or needed to be avoided. i.g. switch_mm is not needed,
just returns and this makes the I & D caches are valid which shows
great improvement of performance including task switching and IPC.
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Hyok says Intel Xscale is not currently supported by uCLinux.
Rather than adding #error statements to the Xscale support files
and causing !MMU+Xscale configurations to fail to build, prevent
Xscale-based machines from being selected in !MMU mode.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This is a trivial patch to export flush_dcache_page in mm/nommu.c.
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove fault-armv.o, mmap.o and mm-armv.o from uclinux builds - these
are concerned with MMU-ful operations, and as such are redundant for
uclinux.
Since this also removes iotable_init() and iotable_init() is used
extensively in the platform support files, just make it a no-op.
Based upon a couple of patches by Hyok.
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
TABLE_SIZE is never used in arch/arm/mm/init.c. create_memmap_holes(),
memtable_init, and setup_io_desc() no longer exist in the kernel.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
nommu doesn't require a complex flush_dcache_page implementation
like the MMU-ful CPUs do, so provide a simplified version in nommu.c
and omit flush.c from the build as appropriate.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Include Kconfig-nommu when MMU is not selected.
(This is part of a patch from Hyok.)
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
nommu doesn't have any form of remapping support, so ioremap, etc
become stubs which just return the casted address, doing nothing
else.
Move ioport_map(), ioport_unmap(), pci_iomap(), pci_iounmap()
into a separate file which is always built.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since uclinux doesn't make use of the TLB, including the TLB
maintainence and CPU-optimised copypage functions does not
make sense. Remove them.
(This is part of one of Hyok's patches.)
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
MMUless systems have only one address space for all threads, so
both the usual access_ok() checks, and the exception handling do
not make much sense.
Hence, discard the fixup and exception tables at link time, use
memcpy/memset for the user copy/clearing functions, and define
the permission check macros to be constants.
Some of this patch was derived from the equivalent patch by
Hyok S. Choi.
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since there can be no fixed location for the TLS value with nommu
systems, we must provide TLS register emulation in order to support
TLS binaries on CPUs without the thread register.
Part of a patch from Hyok S. Choi, and cleaned up by rmk.
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Montecito is coming with dual core and threading, so this
four socket box can now have sixteen logical cpus.
Signed-off-by: Tony Luck <tony.luck@intel.com>
