Commit Graph

1 Commits

Author SHA1 Message Date
Biju Das
343e64a6c4 clk: renesas: Add r8a77470 CPG Core Clock Definitions
Add all RZ/G1C Clock Pulse Generator Core Clock Outputs, as listed in
Table 7.2 ("List of Clocks [RZ/G1C]") of the RZ/G1C Hardware User's
Manual.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
[geert: Use consecutive numbering]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2018-04-16 13:39:38 +02:00