The component struct already has a name and id field which are initialized to
the same values as the same fields in the CODEC and platform structs. So remove
them from the CODEC and platform structs and used the ones from the component
struct instead.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
It is not an error to have no cache so we shouldn't return an error code
and cause our callers to fail, just silently do nothing instead. Thanks
to Jarkko for identify the problematic commit.
Reported-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Reported-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Since we cannot make sure the 'reg_size' will always be none zero here,
and then if 'reg_size' equals to zero, the kzalloc() will return ZERO_SIZE_PTR,
which equals to ((void *)16).
So this patch fix this with just doing the 'reg_size' zero check before calling
kzalloc().
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
There are no ASoC drivers left that use them and new drivers are supposed to use
regmap for this.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
For the snd_soc_cache_init(), the reg_size maybe zero and then the value
of codec->reg_cache, which is alloced via kzalloc, maybe equal to
ZERO_SIZE_PTR. If the reg parameter of snd_soc_cache_write() is large enough,
the cache[idx] = val maybe cause the kernel crash...
So this patch fix this via doing the zero pionter check of it.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
BUG() used in the driver is just to spit the stack trace on buggy
points, not really needed to stop the whole operation. For that
purpose, it'd be more convenient to use WARN() instead with more
error information.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
The only cache type left is the flat cache and new other cache types won't be
added since new drivers are supposed to use regmap directly for IO and caching.
This patch removes the snd_soc_cache_ops indirection that was added to support
multiple cache types and modifies the code to always use the flat cache
directly.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
The reg_size field is calculated in snd_soc_register_codec() and then used
exactly once in snd_soc_flat_cache_init(). Since it is calculated based on other
fields from the codec struct just move the calculation to
snd_soc_flat_cache_init() and remove the 'reg_size' field from the codec struct.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
reg_def_copy was introduced in commit 3335ddca ("ASoC: soc-cache: Use
reg_def_copy instead of reg_cache_default") to keep a copy of the register
defaults around in case the register defaults where placed in the __devinitdata
section. With the __devinitdata section gone we effectivly keep the same data
around twice. This patch removes reg_def_copy and uses reg_cache_default
directly instead.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
No users of reg_access_defaults are left and new drivers are going to use regmap
for this, so support for it can be removed.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
Currently ASoC has a mixture of message prefixes e.g. "ASoC", "asoc"
or none and message types e.g. pr_debug or dev_dbg.
Make sure all ASoC core messages use the same "ASoC" prefix and
convert any component device specific messages to use dev_dbg
instead of pr_debug.
Signed-off-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
There are no current users and new drivers ought to be using the regmap
API and its cache implementation directly so just delete the ASoC copy.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
These aren't modules, but they do make use of these macros, so
they will need export.h to get that definition. Previously,
they got it via the implicit module.h inclusion.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Currently the condition for these WARN_ONs is reversed and they are placed
before the actual check whether we are going to write to that register. So if
the codec implements the register_writable callback we'll get a warning for each
writable register when syncing the register cache.
While we are at it change the check to use snd_soc_codec_writable_register
instead of open-coding it.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Since commit aea170a099
"ASoC: soc-cache: Add reg_size as a member to snd_soc_codec",
the codec_drv pointer variable is not used in snd_soc_lzo_get_blksize.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Since commit d779fce5d7
"ASoC: soc-cache: Ensure flat compression uses a copy of the defaults cache",
the codec_drv pointer variable is not used any more.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
For clarity and to help ongoing refactoring in this area create a new file
to contain the physical I/O functions, separating them out from the cache
operations.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
We've got a whole bunch of functions which just call straight through to
do_hw_read(). Simplify this situation by removing them and using hw_read()
directly.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Currently the rbtree code will write out the entire register map when
doing a cache sync which is wasteful and will slow things down. Check
to see if the value we're about to write is the default and don't bother
restoring it if it is, either the value will have been retained or the
device will have been reset and holds the value already.
We should really store the defaults in the nodes but this resolves the
immediate issue.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Run the data through cpu_to_be16() so it's at least clear what we're up to.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Whenever we are doing a read or a write through the rbtree code, we'll
cache a pointer to the rbnode. To avoid looking up the register
everytime we do a read or a write, we first check if it can be found in
the cached register block, otherwise we traverse the rbtree and finally
cache the rbnode for future use.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This patch prepares the ground for the actual rbtree optimization patch
which will save a pointer to the last accessed rbnode that was used
in either the read() or write() functions.
Each rbnode manages a variable length block of registers. There can be no
two nodes with overlapping blocks. Each block has a base register and a
currently top register, all the other registers, if any, lie in between these
two and in ascending order.
The reasoning behind the construction of this rbtree is simple. In the
snd_soc_rbtree_cache_init() function, we iterate over the register defaults
provided by the driver. For each register value that is non-zero we
insert it in the rbtree. In order to determine in which rbnode we need
to add the register, we first look if there is another register already
added that is adjacent to the one we are about to add. If that is the case
we append it in that rbnode block, otherwise we create a new rbnode
with a single register in its block and add it to the tree.
In the next patch, where a cached rbnode is used by both the write() and the
read() functions, we also check if the register we are about to add is in the
cached rbnode (the least recently accessed one) and if so we append it in that
rbnode block.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
There is an unfortunate difference in return values between spi_write()
and i2c_master_send() so we need an adaptor function to translate.
Reported-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
do_spi_write() is just an open coded copy of do_spi_write() so we can
delete it and just call spi_write() directly. Indeed, as a result of
recent refactoring all the SPI write functions are just very long
wrappers around spi_write() which don't add anything except for some
pointless copies so we can just use spi_write() as the hw_write
operation directly. It should be as type safe to do this as it is to do
the same thing with I2C and it saves us a bunch of code.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
snd_soc_4_12_spi_write() contains a byte swap. Since this code was written
for an Analog CODEC on a Blackfin reference board it appears that this is
done because while Blackfin is little endian the CODEC is big endian (as
are most CODECs).
Push this up into the generic 4x12 write function and use cpu_to_be16() to
do the byte swap so things are more regular and things work on both CPU
endiannesses.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Currently we'll force all registers to fit in 8 bits before passing
down to the I/O function. Looks like a cut'n'paste bug.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
If we specifically want to write a block of data to the hw bypassing the
cache, then allow this to happen inside snd_soc_hw_bulk_write_raw().
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
`type` parameter is not longer used in `snd_soc_codec_set_cache_io`,
so remove this line.
Signed-off-by: Lu Guanqun <guanqun.lu@intel.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This patch fixes to avoid compile error when ASoC codec doesn't use I2C
nor SPI on snd_soc_hw_bulk_write_raw().
Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
When syncing the cache, if the driver has given us a writable_register()
callback, use it to check if we are syncing a non-writable register
and if so warn the user.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
By using struct snd_soc_reg_access for the read/write/vol attributes
of the registers, we provide callbacks that automatically determine whether
a given register is readable/writable or volatile.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
These functions fail with -EINVAL if the corresponding callbacks
are not implemented. Change them to return -ENOSYS as it is more
appropriate for unimplemented callbacks.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The handling of all snd_soc_x_y_spi_write() functions is similar.
Create a separate function and update all callers to use it.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The handling of all snd_soc_x_y_read() functions is similar.
Factor it out into a separate function and update all callers.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The handling of all snd_soc_x_y_write() functions is similar.
Factor it out into a separate function and update all functions
to use it.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
As it has become more common to have to write firmware or similar
large chunks of data to the hardware, add a function to perform
raw bulk writes that bypass the cache. This only handles volatile
registers as we should avoid getting out of sync with the actual
cache.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The handling of all snd_soc_x_y_read_i2c() functions is similar.
Make a generic I2C read function and update all callers to use it.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The patch c358e640a6 "ASoC: soc-cache: Add trace event for
snd_soc_cache_sync()" introduced a dereference of "codec->cache_ops"
before we had checked it for NULL.
I pulled the check forward, and then pulled everything in an indent
level.
Signed-off-by: Dan Carpenter <error27@gmail.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
