Commit Graph

5 Commits

Author SHA1 Message Date
Jernej Skrabec
1de8493069
clk: sunxi-ng: a64: Export MBUS clock
MBUS clock will be referenced in MBUS controller node.

Export it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-02-11 07:49:14 +01:00
Vasily Khoruzhick
a9b5c67178
clk: sunxi-ng: a64: export CLK_CPUX clock for DVFS
Export CLK_CPUX so we can reference it in CPU node.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-01-04 09:18:08 +01:00
Jagan Teki
8b2a378704
dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro
Allwinner A64 HDMI PHY clock has PLL_VIDEO0 as a parent.

Include the macro on dt-bindings so-that the same can be used
while defining CCU clock phandles.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-09-05 09:19:59 +02:00
Chen-Yu Tsai
d85da227c3 clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM
The PRCM takes PLL_PERIPH0 as one of its parents for the AR100 clock.
As such we need to be able to describe this relationship in the device
tree.

Export the PLL_PERIPH0 clock so we can reference it in the PRCM node.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-31 21:57:30 +02:00
Maxime Ripard
c6a0637460 clk: sunxi-ng: Add A64 clocks
Add the A64 CCU clocks set.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-11-03 09:06:18 +01:00