Add IDs for the memory clients found on NVIDIA Tegra186 SoCs. This will
be used to describe interconnect paths from devices to system memory.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
As opposed to earlier incarnations, the memory controller on Tegra186 no
longer implements an SMMU. Instead the SMMU is a regular ARM SMMU and in
a separate IP block.
However, the memory controller programs the SMMU stream IDs for each of
the memory clients. Add a header file with definitions for each of these
stream IDs and mark the #iommu-cells property as required on Tegra30 to
Tegra210 in the device tree bindings.
Signed-off-by: Thierry Reding <treding@nvidia.com>
