Commit Graph

3 Commits

Author SHA1 Message Date
David Brownell
b98348bdd0 gpiolib: avr32 at32ap platform support
Teach AVR32 to use the "GPIO Library" when exposing its GPIOs, so that signals
on external chips (like GPIO expanders) can easily be used.

This mostly reorganizes some existing logic, with two minor changes in
behavior:

 - The PSR registers are used instead of the previous "gpio_mask" values,
   matching AT91 behavior and removing some duplication between that role
   and that of "pinmux_mask".

 - NR_IRQs grew to acommodate a bank of external GPIOs.  Eventually this
   number should probably become a board-specific config option.

There's a debugfs dump of status for the built-in GPIOs, showing which pins
have deglitching, pullups, or open drain drive enabled, as well as the ID
string used when requesting each IRQ.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Cc: Jean Delvare <khali@linux-fr.org>
Cc: Eric Miao <eric.miao@marvell.com>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Philipp Zabel <philipp.zabel@gmail.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Ben Gardner <bgardner@wabtec.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-02-05 09:44:13 -08:00
Haavard Skinnemoen
7f9f467863 [AVR32] Add PIOE device and reserve SDRAM pins
The PIOE device was left out before because it muxes SDRAM pins (and
is therefore a bit dangerous to mess with) and because no existing
drivers had any use for it.

It is needed for CompactFlash, however, and now that we have a way
to protect the SDRAM pins, it can be safely added.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-02-09 15:01:58 +01:00
Haavard Skinnemoen
6a4e5227a3 [AVR32] GPIO API implementation
Arch-neutral GPIO calls for AVR32. GPIO IRQ support written by
David Brownell.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-02-09 15:01:58 +01:00