forked from luck/tmp_suning_uos_patched
f9720205d1
Add minimum support for the Blackfin relocations, since we don't have enough space in each reloc. The idea is to store a value with one relocation so that subsequent ones can access it. Actually, this patch is required for Blackfin. Currently if BINFMT_FLAT is enabled, git-tree kernel will fail to compile. Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Cc: David McCullough <davidm@snapgear.com> Cc: Greg Ungerer <gerg@snapgear.com> Cc: Miles Bader <miles.bader@necel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
147 lines
4.4 KiB
C
147 lines
4.4 KiB
C
/*
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* include/asm-m32r/flat.h
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*
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* uClinux flat-format executables
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*
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* Copyright (C) 2004 Kazuhiro Inaoka
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive for
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* more details.
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*/
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#ifndef __ASM_M32R_FLAT_H
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#define __ASM_M32R_FLAT_H
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#define flat_stack_align(sp) (*sp += (*sp & 3 ? (4 - (*sp & 3)): 0))
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#define flat_argvp_envp_on_stack() 0
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#define flat_old_ram_flag(flags) (flags)
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#define flat_set_persistent(relval, p) 0
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#define flat_reloc_valid(reloc, size) \
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(((reloc) - textlen_for_m32r_lo16_data) <= (size))
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#define flat_get_addr_from_rp(rp, relval, flags, persistent) \
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m32r_flat_get_addr_from_rp(rp, relval, (text_len) )
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#define flat_put_addr_at_rp(rp, addr, relval) \
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m32r_flat_put_addr_at_rp(rp, addr, relval)
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/* Convert a relocation entry into an address. */
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static inline unsigned long
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flat_get_relocate_addr (unsigned long relval)
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{
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return relval & 0x00ffffff; /* Mask out top 8-bits */
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}
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#define flat_m32r_get_reloc_type(relval) ((relval) >> 24)
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#define M32R_SETH_OPCODE 0xd0c00000 /* SETH instruction code */
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#define FLAT_M32R_32 0x00 /* 32bits reloc */
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#define FLAT_M32R_24 0x01 /* unsigned 24bits reloc */
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#define FLAT_M32R_16 0x02 /* 16bits reloc */
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#define FLAT_M32R_LO16 0x03 /* signed low 16bits reloc (low()) */
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#define FLAT_M32R_LO16_DATA 0x04 /* signed low 16bits reloc (low())
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for a symbol in .data section */
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/* High 16bits of an address used
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when the lower 16bbits are treated
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as unsigned.
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To create SETH instruction only.
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0x1X: X means a number of register.
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0x10 - 0x3F are reserved. */
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#define FLAT_M32R_HI16_ULO 0x10 /* reloc for SETH Rn,#high(imm16) */
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/* High 16bits of an address used
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when the lower 16bbits are treated
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as signed.
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To create SETH instruction only.
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0x2X: X means a number of register.
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0x20 - 0x4F are reserved. */
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#define FLAT_M32R_HI16_SLO 0x20 /* reloc for SETH Rn,#shigh(imm16) */
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static unsigned long textlen_for_m32r_lo16_data = 0;
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static inline unsigned long m32r_flat_get_addr_from_rp (unsigned long *rp,
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unsigned long relval,
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unsigned long textlen)
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{
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unsigned int reloc = flat_m32r_get_reloc_type (relval);
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textlen_for_m32r_lo16_data = 0;
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if (reloc & 0xf0) {
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unsigned long addr = htonl(*rp);
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switch (reloc & 0xf0)
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{
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case FLAT_M32R_HI16_ULO:
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case FLAT_M32R_HI16_SLO:
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if (addr == 0) {
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/* put "seth Rn,#0x0" instead of 0 (addr). */
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*rp = (M32R_SETH_OPCODE | ((reloc & 0x0f)<<24));
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}
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return addr;
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default:
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break;
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}
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} else {
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switch (reloc)
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{
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case FLAT_M32R_LO16:
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return htonl(*rp) & 0xFFFF;
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case FLAT_M32R_LO16_DATA:
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/* FIXME: The return value will decrease by textlen
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at m32r_flat_put_addr_at_rp () */
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textlen_for_m32r_lo16_data = textlen;
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return (htonl(*rp) & 0xFFFF) + textlen;
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case FLAT_M32R_16:
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return htons(*(unsigned short *)rp) & 0xFFFF;
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case FLAT_M32R_24:
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return htonl(*rp) & 0xFFFFFF;
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case FLAT_M32R_32:
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return htonl(*rp);
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default:
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break;
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}
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}
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return ~0; /* bogus value */
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}
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static inline void m32r_flat_put_addr_at_rp (unsigned long *rp,
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unsigned long addr,
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unsigned long relval)
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{
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unsigned int reloc = flat_m32r_get_reloc_type (relval);
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if (reloc & 0xf0) {
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unsigned long Rn = reloc & 0x0f; /* get a number of register */
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Rn <<= 24; /* 0x0R000000 */
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reloc &= 0xf0;
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switch (reloc)
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{
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case FLAT_M32R_HI16_ULO: /* To create SETH Rn,#high(imm16) */
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*rp = (M32R_SETH_OPCODE | Rn
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| ((addr >> 16) & 0xFFFF));
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break;
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case FLAT_M32R_HI16_SLO: /* To create SETH Rn,#shigh(imm16) */
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*rp = (M32R_SETH_OPCODE | Rn
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| (((addr >> 16) + ((addr & 0x8000) ? 1 : 0))
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& 0xFFFF));
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break;
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}
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} else {
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switch (reloc) {
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case FLAT_M32R_LO16_DATA:
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addr -= textlen_for_m32r_lo16_data;
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textlen_for_m32r_lo16_data = 0;
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case FLAT_M32R_LO16:
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*rp = (htonl(*rp) & 0xFFFF0000) | (addr & 0xFFFF);
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break;
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case FLAT_M32R_16:
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*(unsigned short *)rp = addr & 0xFFFF;
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break;
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case FLAT_M32R_24:
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*rp = (htonl(*rp) & 0xFF000000) | (addr & 0xFFFFFF);
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break;
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case FLAT_M32R_32:
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*rp = addr;
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break;
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}
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}
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}
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#endif /* __ASM_M32R_FLAT_H */
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