kernel_optimize_test/include
Anup Patel 6b7ce8927b
irqchip: RISC-V per-HART local interrupt controller driver
The RISC-V per-HART local interrupt controller manages software
interrupts, timer interrupts, external interrupts (which are routed
via the platform level interrupt controller) and other per-HART
local interrupts.

We add a driver for the RISC-V local interrupt controller, which
eventually replaces the RISC-V architecture code, allowing for a
better split between arch code and drivers.

The driver is compliant with RISC-V Hart-Level Interrupt Controller
DT bindings located at:
Documentation/devicetree/bindings/interrupt-controller/riscv,cpu-intc.txt

Co-developed-by: Palmer Dabbelt <palmer@dabbelt.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
[Palmer: Cleaned up warnings]
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2020-06-09 19:11:21 -07:00
..
acpi
asm-generic
clocksource
crypto
drm
dt-bindings
keys
kunit
kvm
linux irqchip: RISC-V per-HART local interrupt controller driver 2020-06-09 19:11:21 -07:00
math-emu
media
misc
net
pcmcia
ras
rdma
scsi
soc
sound
target
trace
uapi
vdso
video
xen