forked from luck/tmp_suning_uos_patched
d2912cb15b
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
128 lines
3.0 KiB
C
128 lines
3.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Intel Low Power Subsystem PWM controller PCI driver
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*
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* Copyright (C) 2014, Intel Corporation
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*
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* Derived from the original pwm-lpss.c
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/pm_runtime.h>
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#include "pwm-lpss.h"
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/* BayTrail */
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static const struct pwm_lpss_boardinfo pwm_lpss_byt_info = {
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.clk_rate = 25000000,
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.npwm = 1,
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.base_unit_bits = 16,
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};
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/* Braswell */
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static const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = {
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.clk_rate = 19200000,
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.npwm = 1,
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.base_unit_bits = 16,
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};
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/* Broxton */
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static const struct pwm_lpss_boardinfo pwm_lpss_bxt_info = {
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.clk_rate = 19200000,
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.npwm = 4,
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.base_unit_bits = 22,
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.bypass = true,
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};
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/* Tangier */
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static const struct pwm_lpss_boardinfo pwm_lpss_tng_info = {
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.clk_rate = 19200000,
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.npwm = 4,
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.base_unit_bits = 22,
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};
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static int pwm_lpss_probe_pci(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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const struct pwm_lpss_boardinfo *info;
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struct pwm_lpss_chip *lpwm;
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int err;
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err = pcim_enable_device(pdev);
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if (err < 0)
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return err;
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info = (struct pwm_lpss_boardinfo *)id->driver_data;
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lpwm = pwm_lpss_probe(&pdev->dev, &pdev->resource[0], info);
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if (IS_ERR(lpwm))
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return PTR_ERR(lpwm);
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pci_set_drvdata(pdev, lpwm);
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pm_runtime_put(&pdev->dev);
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pm_runtime_allow(&pdev->dev);
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return 0;
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}
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static void pwm_lpss_remove_pci(struct pci_dev *pdev)
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{
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struct pwm_lpss_chip *lpwm = pci_get_drvdata(pdev);
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pm_runtime_forbid(&pdev->dev);
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pm_runtime_get_sync(&pdev->dev);
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pwm_lpss_remove(lpwm);
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}
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#ifdef CONFIG_PM
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static int pwm_lpss_runtime_suspend_pci(struct device *dev)
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{
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/*
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* The PCI core will handle transition to D3 automatically. We only
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* need to provide runtime PM hooks for that to happen.
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*/
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return 0;
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}
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static int pwm_lpss_runtime_resume_pci(struct device *dev)
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{
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return 0;
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}
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#endif
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static const struct dev_pm_ops pwm_lpss_pci_pm = {
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SET_RUNTIME_PM_OPS(pwm_lpss_runtime_suspend_pci,
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pwm_lpss_runtime_resume_pci, NULL)
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};
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static const struct pci_device_id pwm_lpss_pci_ids[] = {
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{ PCI_VDEVICE(INTEL, 0x0ac8), (unsigned long)&pwm_lpss_bxt_info},
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{ PCI_VDEVICE(INTEL, 0x0f08), (unsigned long)&pwm_lpss_byt_info},
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{ PCI_VDEVICE(INTEL, 0x0f09), (unsigned long)&pwm_lpss_byt_info},
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{ PCI_VDEVICE(INTEL, 0x11a5), (unsigned long)&pwm_lpss_tng_info},
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{ PCI_VDEVICE(INTEL, 0x1ac8), (unsigned long)&pwm_lpss_bxt_info},
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{ PCI_VDEVICE(INTEL, 0x2288), (unsigned long)&pwm_lpss_bsw_info},
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{ PCI_VDEVICE(INTEL, 0x2289), (unsigned long)&pwm_lpss_bsw_info},
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{ PCI_VDEVICE(INTEL, 0x31c8), (unsigned long)&pwm_lpss_bxt_info},
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{ PCI_VDEVICE(INTEL, 0x5ac8), (unsigned long)&pwm_lpss_bxt_info},
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{ },
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};
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MODULE_DEVICE_TABLE(pci, pwm_lpss_pci_ids);
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static struct pci_driver pwm_lpss_driver_pci = {
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.name = "pwm-lpss",
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.id_table = pwm_lpss_pci_ids,
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.probe = pwm_lpss_probe_pci,
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.remove = pwm_lpss_remove_pci,
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.driver = {
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.pm = &pwm_lpss_pci_pm,
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},
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};
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module_pci_driver(pwm_lpss_driver_pci);
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MODULE_DESCRIPTION("PWM PCI driver for Intel LPSS");
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MODULE_LICENSE("GPL v2");
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