forked from luck/tmp_suning_uos_patched
25ebee020b
This patch adds the support for VFPv3 (the kernel currently supports VFPv2). The main difference is 32 double registers (compared to 16). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
48 lines
1.5 KiB
C
48 lines
1.5 KiB
C
/*
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* linux/include/asm-arm/vfpmacros.h
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*
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* Assembler-only file containing VFP macros and register definitions.
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*/
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#include "vfp.h"
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@ Macros to allow building with old toolkits (with no VFP support)
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.macro VFPFMRX, rd, sysreg, cond
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MRC\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMRX \rd, \sysreg
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.endm
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.macro VFPFMXR, sysreg, rd, cond
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MCR\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMXR \sysreg, \rd
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.endm
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@ read all the working registers back into the VFP
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.macro VFPFLDMIA, base, tmp
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#if __LINUX_ARM_ARCH__ < 6
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LDC p11, cr0, [\base],#33*4 @ FLDMIAX \base!, {d0-d15}
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#else
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LDC p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d0-d15}
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#endif
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#ifdef CONFIG_VFPv3
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VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
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and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
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cmp \tmp, #2 @ 32 x 64bit registers?
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ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
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addne \base, \base, #32*4 @ step over unused register space
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#endif
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.endm
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@ write all the working registers out of the VFP
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.macro VFPFSTMIA, base, tmp
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#if __LINUX_ARM_ARCH__ < 6
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STC p11, cr0, [\base],#33*4 @ FSTMIAX \base!, {d0-d15}
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#else
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STC p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d0-d15}
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#endif
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#ifdef CONFIG_VFPv3
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VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
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and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
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cmp \tmp, #2 @ 32 x 64bit registers?
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stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
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addne \base, \base, #32*4 @ step over unused register space
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#endif
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.endm
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