kernel_optimize_test/drivers/mtd
Miquel Raynal f6997bec6a mtd: rawnand: marvell: fix the chip-select DT parsing logic
The block responsible of parsing the DT for the number of chip-select
lines uses an 'if/else if/else if' block. The content of the second and
third 'else if' conditions are:
        1/ the actual condition to enter the sub-block and
        2/ the operation to do in this sub-block.

        [...]
        else if (condition1_to_enter && action1() == failed)
                raise_error();
        else if (condition2_to_enter && action2() == failed)
                raise_error();
        [...]

In case of failure, the sub-block is entered and an error raised.
Otherwise, in case of success, the code would continue erroneously in
the next 'else if' statement because it did not failed (and did not
enter the first 'else if' sub-block).

The first 'else if' refers to legacy bindings while the second 'else if'
refers to new bindings. The second 'else if', which is entered
erroneously, checks for the 'reg' property, which, for old bindings,
does not mean anything because it would not be the number of CS
available, but the regular register map of almost any DT node. This
being said, the content of the 'reg' property being the register map
offset and length, it has '2' values, so the number of CS in this
situation is assumed to be '2'.

When running nand_scan_ident() with 2 CS, the core will check for an
array of chips. It will first issue a RESET and then a READ_ID. Of
course this will trigger two timeouts because there is no chip in front
of the second CS:

[    1.367460] marvell-nfc f2720000.nand: Timeout on CMDD (NDSR: 0x00000080)
[    1.474292] marvell-nfc f2720000.nand: Timeout on CMDD (NDSR: 0x00000280)

Indeed, this is harmless and the core will then assume there is only one
valid CS.

Fix the logic in the whole block by entering each sub-block just on the
'is legacy' condition, doing the action inside the sub-block. This way,
when the action succeeds, the whole block is left.

Furthermore, for both the old bindings and the new bindings the same
logic was applied to retrieve the number of CS lines:
using of_get_property() to get a size in bytes, converted in the actual
number of lines by dividing it per sizeof(u32) (4 bytes).

This is fine for the 'reg' property which is a list of the CS IDs but
not for the 'num-cs' property which is directly the value of the number
of CS.

Anyway, no existing DT uses another value than 'num-cs = <1>' and no
other value has ever been supported by the old driver (pxa3xx_nand.c).
Remove this condition and apply a number of 1 CS anyway, as already
described in the bindings.

Finally, the 'reg' property of a 'nand' node (with the new bindings)
gives the IDs of each CS line in use. marvell_nand.c driver first look
at the number of CS lines that are present in this property.

Better use of_property_count_elems_of_size() than dividing by 4 the size
of the number of bytes returned by of_get_property().

Fixes: 02f26ecf8c ("mtd: nand: add reworked Marvell NAND controller driver")
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-04-26 19:06:42 +02:00
..
chips mtd: cfi: cmdset_0002: Do not allow read/write to suspend erase block. 2018-04-24 17:42:15 +02:00
devices mtd: Stop updating erase_info->state and calling mtd_erase_callback() 2018-03-21 09:50:56 +01:00
lpddr mtd: Stop updating erase_info->state and calling mtd_erase_callback() 2018-03-21 09:50:56 +01:00
maps mtd: physmap_of: update struct map_info's swap as per map requirement 2018-03-29 09:31:37 +02:00
nand mtd: rawnand: marvell: fix the chip-select DT parsing logic 2018-04-26 19:06:42 +02:00
parsers
spi-nor mtd: spi-nor: cadence-quadspi: Fix page fault kernel panic 2018-04-23 21:42:56 +02:00
tests mtd: tests: check erase block count in page test 2018-03-21 09:50:57 +01:00
ubi This pull request contains updates for both UBI and UBIFS: 2018-04-11 16:39:34 -07:00
afs.c
ar7part.c
bcm47xxpart.c
bcm63xxpart.c
cmdlinepart.c
ftl.c mtd: ftl: Use DIV_ROUND_UP() 2018-03-29 09:36:01 +02:00
inftlcore.c
inftlmount.c mtd: Unconditionally update ->fail_addr and ->addr in part_erase() 2018-03-15 18:22:26 +01:00
Kconfig mtd: Move onenand code base to drivers/mtd/nand/onenand 2018-03-15 15:40:37 +01:00
Makefile mtd: Move onenand code base to drivers/mtd/nand/onenand 2018-03-15 15:40:37 +01:00
mtd_blkdevs.c block: Use blk_queue_flag_*() in drivers instead of queue_flag_*() 2018-03-08 14:13:48 -07:00
mtdblock_ro.c
mtdblock.c mtd: Unconditionally update ->fail_addr and ->addr in part_erase() 2018-03-15 18:22:26 +01:00
mtdchar.c MTD changes: 2018-04-06 12:15:41 -07:00
mtdconcat.c mtd: Stop updating erase_info->state and calling mtd_erase_callback() 2018-03-21 09:50:56 +01:00
mtdcore.c mtd: Fix some function description mismatches in mtdcore.c 2018-03-29 09:31:54 +02:00
mtdcore.h
mtdoops.c mtd: Unconditionally update ->fail_addr and ->addr in part_erase() 2018-03-15 18:22:26 +01:00
mtdpart.c mtd: rename "ofpart" parser to "fixed-partitions" as it fits it better 2018-03-27 09:11:24 +02:00
mtdsuper.c
mtdswap.c mtd: Unconditionally update ->fail_addr and ->addr in part_erase() 2018-03-15 18:22:26 +01:00
nftlcore.c
nftlmount.c mtd: nftl: use %*ph to print small buffer 2018-03-21 09:50:56 +01:00
ofpart.c mtd: ofpart: add of_match_table with "fixed-partitions" 2018-03-27 09:11:31 +02:00
redboot.c
rfd_ftl.c mtd: Unconditionally update ->fail_addr and ->addr in part_erase() 2018-03-15 18:22:26 +01:00
sm_ftl.c Core changes: 2018-04-04 22:11:36 +02:00
sm_ftl.h mtd: Stop assuming mtd_erase() is asynchronous 2018-03-15 18:21:07 +01:00
ssfdc.c