forked from luck/tmp_suning_uos_patched
82992fc70f
The macro ALTERNATIVE_CODE() allows assembly code to patch in a series of new assembler statements given at a specific start address. The ALT_COND_RUN_ON_QEMU condition is true if the kernel is started in a qemu emulation. Signed-off-by: Helge Deller <deller@gmx.de>
111 lines
2.8 KiB
C
111 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Alternative live-patching for parisc.
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* Copyright (C) 2018 Helge Deller <deller@gmx.de>
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*
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*/
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#include <asm/processor.h>
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#include <asm/sections.h>
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#include <asm/alternative.h>
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#include <linux/module.h>
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static int no_alternatives;
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static int __init setup_no_alternatives(char *str)
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{
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no_alternatives = 1;
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return 1;
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}
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__setup("no-alternatives", setup_no_alternatives);
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void __init_or_module apply_alternatives(struct alt_instr *start,
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struct alt_instr *end, const char *module_name)
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{
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struct alt_instr *entry;
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int index = 0, applied = 0;
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int num_cpus = num_online_cpus();
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for (entry = start; entry < end; entry++, index++) {
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u32 *from, cond, replacement;
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s32 len;
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from = (u32 *)((ulong)&entry->orig_offset + entry->orig_offset);
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len = entry->len;
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cond = entry->cond;
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replacement = entry->replacement;
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WARN_ON(!cond);
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if (cond != ALT_COND_ALWAYS && no_alternatives)
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continue;
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pr_debug("Check %d: Cond 0x%x, Replace %02d instructions @ 0x%px with 0x%08x\n",
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index, cond, len, from, replacement);
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if ((cond & ALT_COND_NO_SMP) && (num_cpus != 1))
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continue;
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if ((cond & ALT_COND_NO_DCACHE) && (cache_info.dc_size != 0))
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continue;
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if ((cond & ALT_COND_NO_ICACHE) && (cache_info.ic_size != 0))
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continue;
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if ((cond & ALT_COND_RUN_ON_QEMU) && !running_on_qemu)
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continue;
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/*
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* If the PDC_MODEL capabilities has Non-coherent IO-PDIR bit
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* set (bit #61, big endian), we have to flush and sync every
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* time IO-PDIR is changed in Ike/Astro.
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*/
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if ((cond & ALT_COND_NO_IOC_FDC) &&
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((boot_cpu_data.cpu_type <= pcxw_) ||
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(boot_cpu_data.pdc.capabilities & PDC_MODEL_IOPDIR_FDC)))
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continue;
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/* Want to replace pdtlb by a pdtlb,l instruction? */
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if (replacement == INSN_PxTLB) {
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replacement = *from;
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if (boot_cpu_data.cpu_type >= pcxu) /* >= pa2.0 ? */
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replacement |= (1 << 10); /* set el bit */
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}
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/*
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* Replace instruction with NOPs?
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* For long distance insert a branch instruction instead.
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*/
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if (replacement == INSN_NOP && len > 1)
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replacement = 0xe8000002 + (len-2)*8; /* "b,n .+8" */
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pr_debug("ALTERNATIVE %3d: Cond %2x, Replace %2d instructions to 0x%08x @ 0x%px (%pS)\n",
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index, cond, len, replacement, from, from);
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if (len < 0) {
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/* Replace multiple instruction by new code */
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u32 *source;
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len = -len;
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source = (u32 *)((ulong)&entry->replacement + entry->replacement);
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memcpy(from, source, 4 * len);
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} else {
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/* Replace by one instruction */
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*from = replacement;
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}
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applied++;
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}
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pr_info("%s%salternatives: applied %d out of %d patches\n",
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module_name ? : "", module_name ? " " : "",
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applied, index);
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}
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void __init apply_alternatives_all(void)
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{
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set_kernel_text_rw(1);
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apply_alternatives((struct alt_instr *) &__alt_instructions,
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(struct alt_instr *) &__alt_instructions_end, NULL);
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set_kernel_text_rw(0);
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}
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