forked from luck/tmp_suning_uos_patched
6cbd7ee10e
KVM environments do not support APERF/MPERF MSRs. intel_pstate cannot operate without these registers. The previous validity checks in intel_pstate_msrs_not_valid() are insufficent in nested KVMs. References: https://bugzilla.redhat.com/show_bug.cgi?id=1046317 Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com> Cc: All applicable <stable@vger.kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
923 lines
21 KiB
C
923 lines
21 KiB
C
/*
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* intel_pstate.c: Native P state management for Intel processors
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*
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* (C) Copyright 2012 Intel Corporation
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* Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2
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* of the License.
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*/
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#include <linux/kernel.h>
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#include <linux/kernel_stat.h>
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#include <linux/module.h>
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#include <linux/ktime.h>
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#include <linux/hrtimer.h>
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#include <linux/tick.h>
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#include <linux/slab.h>
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#include <linux/sched.h>
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#include <linux/list.h>
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#include <linux/cpu.h>
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#include <linux/cpufreq.h>
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#include <linux/sysfs.h>
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#include <linux/types.h>
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#include <linux/fs.h>
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#include <linux/debugfs.h>
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#include <linux/acpi.h>
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#include <trace/events/power.h>
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#include <asm/div64.h>
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#include <asm/msr.h>
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#include <asm/cpu_device_id.h>
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#define SAMPLE_COUNT 3
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#define BYT_RATIOS 0x66a
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#define FRAC_BITS 8
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#define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
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#define fp_toint(X) ((X) >> FRAC_BITS)
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static inline int32_t mul_fp(int32_t x, int32_t y)
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{
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return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
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}
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static inline int32_t div_fp(int32_t x, int32_t y)
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{
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return div_s64((int64_t)x << FRAC_BITS, (int64_t)y);
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}
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struct sample {
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int32_t core_pct_busy;
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u64 aperf;
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u64 mperf;
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int freq;
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};
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struct pstate_data {
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int current_pstate;
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int min_pstate;
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int max_pstate;
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int turbo_pstate;
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};
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struct _pid {
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int setpoint;
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int32_t integral;
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int32_t p_gain;
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int32_t i_gain;
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int32_t d_gain;
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int deadband;
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int32_t last_err;
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};
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struct cpudata {
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int cpu;
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char name[64];
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struct timer_list timer;
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struct pstate_data pstate;
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struct _pid pid;
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int min_pstate_count;
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u64 prev_aperf;
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u64 prev_mperf;
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int sample_ptr;
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struct sample samples[SAMPLE_COUNT];
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};
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static struct cpudata **all_cpu_data;
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struct pstate_adjust_policy {
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int sample_rate_ms;
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int deadband;
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int setpoint;
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int p_gain_pct;
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int d_gain_pct;
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int i_gain_pct;
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};
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struct pstate_funcs {
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int (*get_max)(void);
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int (*get_min)(void);
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int (*get_turbo)(void);
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void (*set)(int pstate);
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};
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struct cpu_defaults {
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struct pstate_adjust_policy pid_policy;
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struct pstate_funcs funcs;
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};
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static struct pstate_adjust_policy pid_params;
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static struct pstate_funcs pstate_funcs;
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struct perf_limits {
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int no_turbo;
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int max_perf_pct;
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int min_perf_pct;
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int32_t max_perf;
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int32_t min_perf;
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int max_policy_pct;
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int max_sysfs_pct;
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};
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static struct perf_limits limits = {
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.no_turbo = 0,
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.max_perf_pct = 100,
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.max_perf = int_tofp(1),
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.min_perf_pct = 0,
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.min_perf = 0,
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.max_policy_pct = 100,
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.max_sysfs_pct = 100,
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};
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static inline void pid_reset(struct _pid *pid, int setpoint, int busy,
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int deadband, int integral) {
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pid->setpoint = setpoint;
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pid->deadband = deadband;
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pid->integral = int_tofp(integral);
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pid->last_err = setpoint - busy;
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}
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static inline void pid_p_gain_set(struct _pid *pid, int percent)
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{
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pid->p_gain = div_fp(int_tofp(percent), int_tofp(100));
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}
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static inline void pid_i_gain_set(struct _pid *pid, int percent)
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{
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pid->i_gain = div_fp(int_tofp(percent), int_tofp(100));
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}
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static inline void pid_d_gain_set(struct _pid *pid, int percent)
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{
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pid->d_gain = div_fp(int_tofp(percent), int_tofp(100));
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}
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static signed int pid_calc(struct _pid *pid, int32_t busy)
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{
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signed int result;
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int32_t pterm, dterm, fp_error;
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int32_t integral_limit;
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fp_error = int_tofp(pid->setpoint) - busy;
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if (abs(fp_error) <= int_tofp(pid->deadband))
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return 0;
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pterm = mul_fp(pid->p_gain, fp_error);
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pid->integral += fp_error;
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/* limit the integral term */
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integral_limit = int_tofp(30);
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if (pid->integral > integral_limit)
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pid->integral = integral_limit;
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if (pid->integral < -integral_limit)
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pid->integral = -integral_limit;
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dterm = mul_fp(pid->d_gain, fp_error - pid->last_err);
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pid->last_err = fp_error;
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result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm;
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return (signed int)fp_toint(result);
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}
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static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu)
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{
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pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct);
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pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct);
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pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct);
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pid_reset(&cpu->pid,
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pid_params.setpoint,
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100,
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pid_params.deadband,
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0);
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}
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static inline void intel_pstate_reset_all_pid(void)
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{
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unsigned int cpu;
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for_each_online_cpu(cpu) {
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if (all_cpu_data[cpu])
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intel_pstate_busy_pid_reset(all_cpu_data[cpu]);
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}
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}
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/************************** debugfs begin ************************/
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static int pid_param_set(void *data, u64 val)
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{
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*(u32 *)data = val;
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intel_pstate_reset_all_pid();
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return 0;
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}
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static int pid_param_get(void *data, u64 *val)
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{
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*val = *(u32 *)data;
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get,
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pid_param_set, "%llu\n");
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struct pid_param {
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char *name;
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void *value;
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};
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static struct pid_param pid_files[] = {
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{"sample_rate_ms", &pid_params.sample_rate_ms},
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{"d_gain_pct", &pid_params.d_gain_pct},
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{"i_gain_pct", &pid_params.i_gain_pct},
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{"deadband", &pid_params.deadband},
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{"setpoint", &pid_params.setpoint},
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{"p_gain_pct", &pid_params.p_gain_pct},
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{NULL, NULL}
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};
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static struct dentry *debugfs_parent;
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static void intel_pstate_debug_expose_params(void)
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{
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int i = 0;
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debugfs_parent = debugfs_create_dir("pstate_snb", NULL);
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if (IS_ERR_OR_NULL(debugfs_parent))
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return;
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while (pid_files[i].name) {
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debugfs_create_file(pid_files[i].name, 0660,
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debugfs_parent, pid_files[i].value,
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&fops_pid_param);
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i++;
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}
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}
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/************************** debugfs end ************************/
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/************************** sysfs begin ************************/
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#define show_one(file_name, object) \
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static ssize_t show_##file_name \
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(struct kobject *kobj, struct attribute *attr, char *buf) \
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{ \
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return sprintf(buf, "%u\n", limits.object); \
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}
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static ssize_t store_no_turbo(struct kobject *a, struct attribute *b,
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const char *buf, size_t count)
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{
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unsigned int input;
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int ret;
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ret = sscanf(buf, "%u", &input);
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if (ret != 1)
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return -EINVAL;
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limits.no_turbo = clamp_t(int, input, 0 , 1);
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return count;
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}
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static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b,
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const char *buf, size_t count)
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{
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unsigned int input;
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int ret;
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ret = sscanf(buf, "%u", &input);
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if (ret != 1)
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return -EINVAL;
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limits.max_sysfs_pct = clamp_t(int, input, 0 , 100);
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limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
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limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
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return count;
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}
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static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b,
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const char *buf, size_t count)
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{
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unsigned int input;
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int ret;
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ret = sscanf(buf, "%u", &input);
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if (ret != 1)
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return -EINVAL;
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limits.min_perf_pct = clamp_t(int, input, 0 , 100);
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limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
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return count;
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}
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show_one(no_turbo, no_turbo);
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show_one(max_perf_pct, max_perf_pct);
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show_one(min_perf_pct, min_perf_pct);
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define_one_global_rw(no_turbo);
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define_one_global_rw(max_perf_pct);
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define_one_global_rw(min_perf_pct);
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static struct attribute *intel_pstate_attributes[] = {
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&no_turbo.attr,
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&max_perf_pct.attr,
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&min_perf_pct.attr,
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NULL
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};
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static struct attribute_group intel_pstate_attr_group = {
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.attrs = intel_pstate_attributes,
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};
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static struct kobject *intel_pstate_kobject;
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static void intel_pstate_sysfs_expose_params(void)
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{
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int rc;
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intel_pstate_kobject = kobject_create_and_add("intel_pstate",
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&cpu_subsys.dev_root->kobj);
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BUG_ON(!intel_pstate_kobject);
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rc = sysfs_create_group(intel_pstate_kobject,
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&intel_pstate_attr_group);
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BUG_ON(rc);
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}
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/************************** sysfs end ************************/
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static int byt_get_min_pstate(void)
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{
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u64 value;
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rdmsrl(BYT_RATIOS, value);
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return value & 0xFF;
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}
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static int byt_get_max_pstate(void)
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{
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u64 value;
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rdmsrl(BYT_RATIOS, value);
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return (value >> 16) & 0xFF;
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}
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static int core_get_min_pstate(void)
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{
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u64 value;
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rdmsrl(MSR_PLATFORM_INFO, value);
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return (value >> 40) & 0xFF;
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}
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static int core_get_max_pstate(void)
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{
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u64 value;
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rdmsrl(MSR_PLATFORM_INFO, value);
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return (value >> 8) & 0xFF;
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}
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static int core_get_turbo_pstate(void)
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{
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u64 value;
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int nont, ret;
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rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
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nont = core_get_max_pstate();
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ret = ((value) & 255);
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if (ret <= nont)
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ret = nont;
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return ret;
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}
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static void core_set_pstate(int pstate)
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{
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u64 val;
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val = pstate << 8;
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if (limits.no_turbo)
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val |= (u64)1 << 32;
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wrmsrl(MSR_IA32_PERF_CTL, val);
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}
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static struct cpu_defaults core_params = {
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.pid_policy = {
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.sample_rate_ms = 10,
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.deadband = 0,
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.setpoint = 97,
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.p_gain_pct = 20,
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.d_gain_pct = 0,
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.i_gain_pct = 0,
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},
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.funcs = {
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.get_max = core_get_max_pstate,
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.get_min = core_get_min_pstate,
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.get_turbo = core_get_turbo_pstate,
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.set = core_set_pstate,
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},
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};
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static struct cpu_defaults byt_params = {
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.pid_policy = {
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.sample_rate_ms = 10,
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.deadband = 0,
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.setpoint = 97,
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.p_gain_pct = 14,
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.d_gain_pct = 0,
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.i_gain_pct = 4,
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},
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.funcs = {
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.get_max = byt_get_max_pstate,
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.get_min = byt_get_min_pstate,
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.get_turbo = byt_get_max_pstate,
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.set = core_set_pstate,
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},
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};
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static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max)
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{
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int max_perf = cpu->pstate.turbo_pstate;
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int max_perf_adj;
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int min_perf;
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if (limits.no_turbo)
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max_perf = cpu->pstate.max_pstate;
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max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf));
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*max = clamp_t(int, max_perf_adj,
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cpu->pstate.min_pstate, cpu->pstate.turbo_pstate);
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min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf));
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*min = clamp_t(int, min_perf,
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cpu->pstate.min_pstate, max_perf);
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}
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static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
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{
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int max_perf, min_perf;
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intel_pstate_get_min_max(cpu, &min_perf, &max_perf);
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pstate = clamp_t(int, pstate, min_perf, max_perf);
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if (pstate == cpu->pstate.current_pstate)
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return;
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trace_cpu_frequency(pstate * 100000, cpu->cpu);
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cpu->pstate.current_pstate = pstate;
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pstate_funcs.set(pstate);
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}
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static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps)
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{
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int target;
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target = cpu->pstate.current_pstate + steps;
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intel_pstate_set_pstate(cpu, target);
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}
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static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps)
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{
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int target;
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target = cpu->pstate.current_pstate - steps;
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intel_pstate_set_pstate(cpu, target);
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}
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static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
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{
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sprintf(cpu->name, "Intel 2nd generation core");
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cpu->pstate.min_pstate = pstate_funcs.get_min();
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cpu->pstate.max_pstate = pstate_funcs.get_max();
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cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
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/*
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* goto max pstate so we don't slow up boot if we are built-in if we are
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* a module we will take care of it during normal operation
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*/
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intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
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}
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static inline void intel_pstate_calc_busy(struct cpudata *cpu,
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struct sample *sample)
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{
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u64 core_pct;
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core_pct = div64_u64(int_tofp(sample->aperf * 100),
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sample->mperf);
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sample->freq = fp_toint(cpu->pstate.max_pstate * core_pct * 1000);
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sample->core_pct_busy = core_pct;
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}
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static inline void intel_pstate_sample(struct cpudata *cpu)
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{
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u64 aperf, mperf;
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rdmsrl(MSR_IA32_APERF, aperf);
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rdmsrl(MSR_IA32_MPERF, mperf);
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cpu->sample_ptr = (cpu->sample_ptr + 1) % SAMPLE_COUNT;
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cpu->samples[cpu->sample_ptr].aperf = aperf;
|
|
cpu->samples[cpu->sample_ptr].mperf = mperf;
|
|
cpu->samples[cpu->sample_ptr].aperf -= cpu->prev_aperf;
|
|
cpu->samples[cpu->sample_ptr].mperf -= cpu->prev_mperf;
|
|
|
|
intel_pstate_calc_busy(cpu, &cpu->samples[cpu->sample_ptr]);
|
|
|
|
cpu->prev_aperf = aperf;
|
|
cpu->prev_mperf = mperf;
|
|
}
|
|
|
|
static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
|
|
{
|
|
int sample_time, delay;
|
|
|
|
sample_time = pid_params.sample_rate_ms;
|
|
delay = msecs_to_jiffies(sample_time);
|
|
mod_timer_pinned(&cpu->timer, jiffies + delay);
|
|
}
|
|
|
|
static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu)
|
|
{
|
|
int32_t core_busy, max_pstate, current_pstate;
|
|
|
|
core_busy = cpu->samples[cpu->sample_ptr].core_pct_busy;
|
|
max_pstate = int_tofp(cpu->pstate.max_pstate);
|
|
current_pstate = int_tofp(cpu->pstate.current_pstate);
|
|
return mul_fp(core_busy, div_fp(max_pstate, current_pstate));
|
|
}
|
|
|
|
static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu)
|
|
{
|
|
int32_t busy_scaled;
|
|
struct _pid *pid;
|
|
signed int ctl = 0;
|
|
int steps;
|
|
|
|
pid = &cpu->pid;
|
|
busy_scaled = intel_pstate_get_scaled_busy(cpu);
|
|
|
|
ctl = pid_calc(pid, busy_scaled);
|
|
|
|
steps = abs(ctl);
|
|
if (ctl < 0)
|
|
intel_pstate_pstate_increase(cpu, steps);
|
|
else
|
|
intel_pstate_pstate_decrease(cpu, steps);
|
|
}
|
|
|
|
static void intel_pstate_timer_func(unsigned long __data)
|
|
{
|
|
struct cpudata *cpu = (struct cpudata *) __data;
|
|
|
|
intel_pstate_sample(cpu);
|
|
intel_pstate_adjust_busy_pstate(cpu);
|
|
|
|
if (cpu->pstate.current_pstate == cpu->pstate.min_pstate) {
|
|
cpu->min_pstate_count++;
|
|
if (!(cpu->min_pstate_count % 5)) {
|
|
intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
|
|
}
|
|
} else
|
|
cpu->min_pstate_count = 0;
|
|
|
|
intel_pstate_set_sample_time(cpu);
|
|
}
|
|
|
|
#define ICPU(model, policy) \
|
|
{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\
|
|
(unsigned long)&policy }
|
|
|
|
static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
|
|
ICPU(0x2a, core_params),
|
|
ICPU(0x2d, core_params),
|
|
ICPU(0x37, byt_params),
|
|
ICPU(0x3a, core_params),
|
|
ICPU(0x3c, core_params),
|
|
ICPU(0x3e, core_params),
|
|
ICPU(0x3f, core_params),
|
|
ICPU(0x45, core_params),
|
|
ICPU(0x46, core_params),
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
|
|
|
|
static int intel_pstate_init_cpu(unsigned int cpunum)
|
|
{
|
|
|
|
const struct x86_cpu_id *id;
|
|
struct cpudata *cpu;
|
|
|
|
id = x86_match_cpu(intel_pstate_cpu_ids);
|
|
if (!id)
|
|
return -ENODEV;
|
|
|
|
all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL);
|
|
if (!all_cpu_data[cpunum])
|
|
return -ENOMEM;
|
|
|
|
cpu = all_cpu_data[cpunum];
|
|
|
|
intel_pstate_get_cpu_pstates(cpu);
|
|
if (!cpu->pstate.current_pstate) {
|
|
all_cpu_data[cpunum] = NULL;
|
|
kfree(cpu);
|
|
return -ENODATA;
|
|
}
|
|
|
|
cpu->cpu = cpunum;
|
|
|
|
init_timer_deferrable(&cpu->timer);
|
|
cpu->timer.function = intel_pstate_timer_func;
|
|
cpu->timer.data =
|
|
(unsigned long)cpu;
|
|
cpu->timer.expires = jiffies + HZ/100;
|
|
intel_pstate_busy_pid_reset(cpu);
|
|
intel_pstate_sample(cpu);
|
|
intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
|
|
|
|
add_timer_on(&cpu->timer, cpunum);
|
|
|
|
pr_info("Intel pstate controlling: cpu %d\n", cpunum);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static unsigned int intel_pstate_get(unsigned int cpu_num)
|
|
{
|
|
struct sample *sample;
|
|
struct cpudata *cpu;
|
|
|
|
cpu = all_cpu_data[cpu_num];
|
|
if (!cpu)
|
|
return 0;
|
|
sample = &cpu->samples[cpu->sample_ptr];
|
|
return sample->freq;
|
|
}
|
|
|
|
static int intel_pstate_set_policy(struct cpufreq_policy *policy)
|
|
{
|
|
struct cpudata *cpu;
|
|
|
|
cpu = all_cpu_data[policy->cpu];
|
|
|
|
if (!policy->cpuinfo.max_freq)
|
|
return -ENODEV;
|
|
|
|
if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
|
|
limits.min_perf_pct = 100;
|
|
limits.min_perf = int_tofp(1);
|
|
limits.max_perf_pct = 100;
|
|
limits.max_perf = int_tofp(1);
|
|
limits.no_turbo = 0;
|
|
return 0;
|
|
}
|
|
limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
|
|
limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100);
|
|
limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
|
|
|
|
limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq;
|
|
limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100);
|
|
limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
|
|
limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int intel_pstate_verify_policy(struct cpufreq_policy *policy)
|
|
{
|
|
cpufreq_verify_within_cpu_limits(policy);
|
|
|
|
if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
|
|
(policy->policy != CPUFREQ_POLICY_PERFORMANCE))
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int intel_pstate_cpu_exit(struct cpufreq_policy *policy)
|
|
{
|
|
int cpu = policy->cpu;
|
|
|
|
del_timer(&all_cpu_data[cpu]->timer);
|
|
kfree(all_cpu_data[cpu]);
|
|
all_cpu_data[cpu] = NULL;
|
|
return 0;
|
|
}
|
|
|
|
static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
|
|
{
|
|
struct cpudata *cpu;
|
|
int rc;
|
|
|
|
rc = intel_pstate_init_cpu(policy->cpu);
|
|
if (rc)
|
|
return rc;
|
|
|
|
cpu = all_cpu_data[policy->cpu];
|
|
|
|
if (!limits.no_turbo &&
|
|
limits.min_perf_pct == 100 && limits.max_perf_pct == 100)
|
|
policy->policy = CPUFREQ_POLICY_PERFORMANCE;
|
|
else
|
|
policy->policy = CPUFREQ_POLICY_POWERSAVE;
|
|
|
|
policy->min = cpu->pstate.min_pstate * 100000;
|
|
policy->max = cpu->pstate.turbo_pstate * 100000;
|
|
|
|
/* cpuinfo and default policy values */
|
|
policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000;
|
|
policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000;
|
|
policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
|
|
cpumask_set_cpu(policy->cpu, policy->cpus);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct cpufreq_driver intel_pstate_driver = {
|
|
.flags = CPUFREQ_CONST_LOOPS,
|
|
.verify = intel_pstate_verify_policy,
|
|
.setpolicy = intel_pstate_set_policy,
|
|
.get = intel_pstate_get,
|
|
.init = intel_pstate_cpu_init,
|
|
.exit = intel_pstate_cpu_exit,
|
|
.name = "intel_pstate",
|
|
};
|
|
|
|
static int __initdata no_load;
|
|
|
|
static int intel_pstate_msrs_not_valid(void)
|
|
{
|
|
/* Check that all the msr's we are using are valid. */
|
|
u64 aperf, mperf, tmp;
|
|
|
|
rdmsrl(MSR_IA32_APERF, aperf);
|
|
rdmsrl(MSR_IA32_MPERF, mperf);
|
|
|
|
if (!pstate_funcs.get_max() ||
|
|
!pstate_funcs.get_min() ||
|
|
!pstate_funcs.get_turbo())
|
|
return -ENODEV;
|
|
|
|
rdmsrl(MSR_IA32_APERF, tmp);
|
|
if (!(tmp - aperf))
|
|
return -ENODEV;
|
|
|
|
rdmsrl(MSR_IA32_MPERF, tmp);
|
|
if (!(tmp - mperf))
|
|
return -ENODEV;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void copy_pid_params(struct pstate_adjust_policy *policy)
|
|
{
|
|
pid_params.sample_rate_ms = policy->sample_rate_ms;
|
|
pid_params.p_gain_pct = policy->p_gain_pct;
|
|
pid_params.i_gain_pct = policy->i_gain_pct;
|
|
pid_params.d_gain_pct = policy->d_gain_pct;
|
|
pid_params.deadband = policy->deadband;
|
|
pid_params.setpoint = policy->setpoint;
|
|
}
|
|
|
|
static void copy_cpu_funcs(struct pstate_funcs *funcs)
|
|
{
|
|
pstate_funcs.get_max = funcs->get_max;
|
|
pstate_funcs.get_min = funcs->get_min;
|
|
pstate_funcs.get_turbo = funcs->get_turbo;
|
|
pstate_funcs.set = funcs->set;
|
|
}
|
|
|
|
#if IS_ENABLED(CONFIG_ACPI)
|
|
#include <acpi/processor.h>
|
|
|
|
static bool intel_pstate_no_acpi_pss(void)
|
|
{
|
|
int i;
|
|
|
|
for_each_possible_cpu(i) {
|
|
acpi_status status;
|
|
union acpi_object *pss;
|
|
struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
|
|
struct acpi_processor *pr = per_cpu(processors, i);
|
|
|
|
if (!pr)
|
|
continue;
|
|
|
|
status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer);
|
|
if (ACPI_FAILURE(status))
|
|
continue;
|
|
|
|
pss = buffer.pointer;
|
|
if (pss && pss->type == ACPI_TYPE_PACKAGE) {
|
|
kfree(pss);
|
|
return false;
|
|
}
|
|
|
|
kfree(pss);
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
struct hw_vendor_info {
|
|
u16 valid;
|
|
char oem_id[ACPI_OEM_ID_SIZE];
|
|
char oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
|
|
};
|
|
|
|
/* Hardware vendor-specific info that has its own power management modes */
|
|
static struct hw_vendor_info vendor_info[] = {
|
|
{1, "HP ", "ProLiant"},
|
|
{0, "", ""},
|
|
};
|
|
|
|
static bool intel_pstate_platform_pwr_mgmt_exists(void)
|
|
{
|
|
struct acpi_table_header hdr;
|
|
struct hw_vendor_info *v_info;
|
|
|
|
if (acpi_disabled
|
|
|| ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr)))
|
|
return false;
|
|
|
|
for (v_info = vendor_info; v_info->valid; v_info++) {
|
|
if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE)
|
|
&& !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE)
|
|
&& intel_pstate_no_acpi_pss())
|
|
return true;
|
|
}
|
|
|
|
return false;
|
|
}
|
|
#else /* CONFIG_ACPI not enabled */
|
|
static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
|
|
#endif /* CONFIG_ACPI */
|
|
|
|
static int __init intel_pstate_init(void)
|
|
{
|
|
int cpu, rc = 0;
|
|
const struct x86_cpu_id *id;
|
|
struct cpu_defaults *cpu_info;
|
|
|
|
if (no_load)
|
|
return -ENODEV;
|
|
|
|
id = x86_match_cpu(intel_pstate_cpu_ids);
|
|
if (!id)
|
|
return -ENODEV;
|
|
|
|
/*
|
|
* The Intel pstate driver will be ignored if the platform
|
|
* firmware has its own power management modes.
|
|
*/
|
|
if (intel_pstate_platform_pwr_mgmt_exists())
|
|
return -ENODEV;
|
|
|
|
cpu_info = (struct cpu_defaults *)id->driver_data;
|
|
|
|
copy_pid_params(&cpu_info->pid_policy);
|
|
copy_cpu_funcs(&cpu_info->funcs);
|
|
|
|
if (intel_pstate_msrs_not_valid())
|
|
return -ENODEV;
|
|
|
|
pr_info("Intel P-state driver initializing.\n");
|
|
|
|
all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
|
|
if (!all_cpu_data)
|
|
return -ENOMEM;
|
|
|
|
rc = cpufreq_register_driver(&intel_pstate_driver);
|
|
if (rc)
|
|
goto out;
|
|
|
|
intel_pstate_debug_expose_params();
|
|
intel_pstate_sysfs_expose_params();
|
|
return rc;
|
|
out:
|
|
get_online_cpus();
|
|
for_each_online_cpu(cpu) {
|
|
if (all_cpu_data[cpu]) {
|
|
del_timer_sync(&all_cpu_data[cpu]->timer);
|
|
kfree(all_cpu_data[cpu]);
|
|
}
|
|
}
|
|
|
|
put_online_cpus();
|
|
vfree(all_cpu_data);
|
|
return -ENODEV;
|
|
}
|
|
device_initcall(intel_pstate_init);
|
|
|
|
static int __init intel_pstate_setup(char *str)
|
|
{
|
|
if (!str)
|
|
return -EINVAL;
|
|
|
|
if (!strcmp(str, "disable"))
|
|
no_load = 1;
|
|
return 0;
|
|
}
|
|
early_param("intel_pstate", intel_pstate_setup);
|
|
|
|
MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
|
|
MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
|
|
MODULE_LICENSE("GPL");
|