forked from luck/tmp_suning_uos_patched
0ce68c7416
Bugfixes: * Move the wake_queue logic from tx_intr to clean_tx * Always do wake_queue even if queue wasn't full before clean since it's safe to do * Fix polarity in checks in pasemi_mac_close Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Jeff Garzik <jeff@garzik.org>
1013 lines
25 KiB
C
1013 lines
25 KiB
C
/*
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* Copyright (C) 2006-2007 PA Semi, Inc
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*
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* Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/interrupt.h>
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#include <linux/dmaengine.h>
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#include <linux/delay.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <asm/dma-mapping.h>
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#include <linux/in.h>
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#include <linux/skbuff.h>
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#include <linux/ip.h>
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#include <linux/tcp.h>
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#include <net/checksum.h>
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#include "pasemi_mac.h"
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/* TODO list
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*
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* - Get rid of pci_{read,write}_config(), map registers with ioremap
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* for performance
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* - PHY support
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* - Multicast support
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* - Large MTU support
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* - Other performance improvements
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*/
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/* Must be a power of two */
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#define RX_RING_SIZE 512
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#define TX_RING_SIZE 512
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#define TX_DESC(mac, num) ((mac)->tx->desc[(num) & (TX_RING_SIZE-1)])
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#define TX_DESC_INFO(mac, num) ((mac)->tx->desc_info[(num) & (TX_RING_SIZE-1)])
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#define RX_DESC(mac, num) ((mac)->rx->desc[(num) & (RX_RING_SIZE-1)])
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#define RX_DESC_INFO(mac, num) ((mac)->rx->desc_info[(num) & (RX_RING_SIZE-1)])
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#define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
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#define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
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/* XXXOJN these should come out of the device tree some day */
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#define PAS_DMA_CAP_BASE 0xe00d0040
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#define PAS_DMA_CAP_SIZE 0x100
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#define PAS_DMA_COM_BASE 0xe00d0100
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#define PAS_DMA_COM_SIZE 0x100
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static struct pasdma_status *dma_status;
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static int pasemi_get_mac_addr(struct pasemi_mac *mac)
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{
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struct pci_dev *pdev = mac->pdev;
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struct device_node *dn = pci_device_to_OF_node(pdev);
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const u8 *maddr;
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u8 addr[6];
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if (!dn) {
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dev_dbg(&pdev->dev,
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"No device node for mac, not configuring\n");
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return -ENOENT;
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}
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maddr = get_property(dn, "mac-address", NULL);
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if (maddr == NULL) {
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dev_warn(&pdev->dev,
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"no mac address in device tree, not configuring\n");
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return -ENOENT;
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}
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if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
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&addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
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dev_warn(&pdev->dev,
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"can't parse mac address, not configuring\n");
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return -EINVAL;
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}
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memcpy(mac->mac_addr, addr, sizeof(addr));
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return 0;
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}
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static int pasemi_mac_setup_rx_resources(struct net_device *dev)
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{
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struct pasemi_mac_rxring *ring;
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struct pasemi_mac *mac = netdev_priv(dev);
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int chan_id = mac->dma_rxch;
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ring = kzalloc(sizeof(*ring), GFP_KERNEL);
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if (!ring)
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goto out_ring;
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spin_lock_init(&ring->lock);
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ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
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RX_RING_SIZE, GFP_KERNEL);
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if (!ring->desc_info)
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goto out_desc_info;
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/* Allocate descriptors */
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ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
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RX_RING_SIZE *
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sizeof(struct pas_dma_xct_descr),
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&ring->dma, GFP_KERNEL);
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if (!ring->desc)
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goto out_desc;
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memset(ring->desc, 0, RX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
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ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
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RX_RING_SIZE * sizeof(u64),
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&ring->buf_dma, GFP_KERNEL);
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if (!ring->buffers)
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goto out_buffers;
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memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
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pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_BASEL(chan_id),
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PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
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pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_BASEU(chan_id),
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PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
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PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 2));
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pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_CFG(chan_id),
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PAS_DMA_RXCHAN_CFG_HBU(1));
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pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXINT_BASEL(mac->dma_if),
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PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
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pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXINT_BASEU(mac->dma_if),
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PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
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PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
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ring->next_to_fill = 0;
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ring->next_to_clean = 0;
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snprintf(ring->irq_name, sizeof(ring->irq_name),
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"%s rx", dev->name);
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mac->rx = ring;
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return 0;
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out_buffers:
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dma_free_coherent(&mac->dma_pdev->dev,
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RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
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mac->rx->desc, mac->rx->dma);
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out_desc:
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kfree(ring->desc_info);
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out_desc_info:
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kfree(ring);
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out_ring:
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return -ENOMEM;
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}
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static int pasemi_mac_setup_tx_resources(struct net_device *dev)
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{
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struct pasemi_mac *mac = netdev_priv(dev);
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u32 val;
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int chan_id = mac->dma_txch;
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struct pasemi_mac_txring *ring;
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ring = kzalloc(sizeof(*ring), GFP_KERNEL);
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if (!ring)
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goto out_ring;
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spin_lock_init(&ring->lock);
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ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
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TX_RING_SIZE, GFP_KERNEL);
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if (!ring->desc_info)
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goto out_desc_info;
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/* Allocate descriptors */
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ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
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TX_RING_SIZE *
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sizeof(struct pas_dma_xct_descr),
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&ring->dma, GFP_KERNEL);
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if (!ring->desc)
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goto out_desc;
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memset(ring->desc, 0, TX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
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pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_BASEL(chan_id),
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PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
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val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
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val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 2);
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pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_BASEU(chan_id), val);
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pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_CFG(chan_id),
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PAS_DMA_TXCHAN_CFG_TY_IFACE |
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PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
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PAS_DMA_TXCHAN_CFG_UP |
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PAS_DMA_TXCHAN_CFG_WT(2));
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ring->next_to_use = 0;
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ring->next_to_clean = 0;
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snprintf(ring->irq_name, sizeof(ring->irq_name),
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"%s tx", dev->name);
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mac->tx = ring;
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return 0;
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out_desc:
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kfree(ring->desc_info);
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out_desc_info:
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kfree(ring);
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out_ring:
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return -ENOMEM;
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}
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static void pasemi_mac_free_tx_resources(struct net_device *dev)
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{
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struct pasemi_mac *mac = netdev_priv(dev);
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unsigned int i;
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struct pasemi_mac_buffer *info;
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struct pas_dma_xct_descr *dp;
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for (i = 0; i < TX_RING_SIZE; i++) {
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info = &TX_DESC_INFO(mac, i);
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dp = &TX_DESC(mac, i);
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if (info->dma) {
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if (info->skb) {
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pci_unmap_single(mac->dma_pdev,
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info->dma,
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info->skb->len,
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PCI_DMA_TODEVICE);
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dev_kfree_skb_any(info->skb);
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}
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info->dma = 0;
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info->skb = NULL;
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dp->mactx = 0;
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dp->ptr = 0;
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}
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}
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dma_free_coherent(&mac->dma_pdev->dev,
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TX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
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mac->tx->desc, mac->tx->dma);
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kfree(mac->tx->desc_info);
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kfree(mac->tx);
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mac->tx = NULL;
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}
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static void pasemi_mac_free_rx_resources(struct net_device *dev)
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{
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struct pasemi_mac *mac = netdev_priv(dev);
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unsigned int i;
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struct pasemi_mac_buffer *info;
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struct pas_dma_xct_descr *dp;
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for (i = 0; i < RX_RING_SIZE; i++) {
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info = &RX_DESC_INFO(mac, i);
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dp = &RX_DESC(mac, i);
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if (info->dma) {
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if (info->skb) {
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pci_unmap_single(mac->dma_pdev,
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info->dma,
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info->skb->len,
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PCI_DMA_FROMDEVICE);
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dev_kfree_skb_any(info->skb);
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}
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info->dma = 0;
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info->skb = NULL;
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dp->macrx = 0;
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dp->ptr = 0;
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}
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}
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dma_free_coherent(&mac->dma_pdev->dev,
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RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
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mac->rx->desc, mac->rx->dma);
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dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
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mac->rx->buffers, mac->rx->buf_dma);
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kfree(mac->rx->desc_info);
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kfree(mac->rx);
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mac->rx = NULL;
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}
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static void pasemi_mac_replenish_rx_ring(struct net_device *dev)
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{
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struct pasemi_mac *mac = netdev_priv(dev);
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unsigned int i;
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int start = mac->rx->next_to_fill;
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unsigned int count;
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count = (mac->rx->next_to_clean + RX_RING_SIZE -
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mac->rx->next_to_fill) & (RX_RING_SIZE - 1);
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/* Check to see if we're doing first-time setup */
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if (unlikely(mac->rx->next_to_clean == 0 && mac->rx->next_to_fill == 0))
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count = RX_RING_SIZE;
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if (count <= 0)
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return;
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for (i = start; i < start + count; i++) {
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struct pasemi_mac_buffer *info = &RX_DESC_INFO(mac, i);
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u64 *buff = &RX_BUFF(mac, i);
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struct sk_buff *skb;
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dma_addr_t dma;
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skb = dev_alloc_skb(BUF_SIZE);
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if (!skb) {
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count = i - start;
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break;
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}
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dma = pci_map_single(mac->dma_pdev, skb->data, skb->len,
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PCI_DMA_FROMDEVICE);
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if (dma_mapping_error(dma)) {
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dev_kfree_skb_irq(info->skb);
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count = i - start;
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break;
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}
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info->skb = skb;
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info->dma = dma;
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*buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
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}
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wmb();
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pci_write_config_dword(mac->dma_pdev,
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PAS_DMA_RXCHAN_INCR(mac->dma_rxch),
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count);
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pci_write_config_dword(mac->dma_pdev,
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PAS_DMA_RXINT_INCR(mac->dma_if),
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count);
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mac->rx->next_to_fill += count;
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}
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static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
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{
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unsigned int i;
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int start, count;
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spin_lock(&mac->rx->lock);
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start = mac->rx->next_to_clean;
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count = 0;
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for (i = start; i < (start + RX_RING_SIZE) && count < limit; i++) {
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struct pas_dma_xct_descr *dp;
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struct pasemi_mac_buffer *info;
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struct sk_buff *skb;
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unsigned int j, len;
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dma_addr_t dma;
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rmb();
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dp = &RX_DESC(mac, i);
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if (!(dp->macrx & XCT_MACRX_O))
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break;
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count++;
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info = NULL;
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/* We have to scan for our skb since there's no way
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* to back-map them from the descriptor, and if we
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* have several receive channels then they might not
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* show up in the same order as they were put on the
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* interface ring.
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*/
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dma = (dp->ptr & XCT_PTR_ADDR_M);
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for (j = start; j < (start + RX_RING_SIZE); j++) {
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info = &RX_DESC_INFO(mac, j);
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if (info->dma == dma)
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break;
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}
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BUG_ON(!info);
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BUG_ON(info->dma != dma);
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pci_unmap_single(mac->dma_pdev, info->dma, info->skb->len,
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PCI_DMA_FROMDEVICE);
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skb = info->skb;
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len = (dp->macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
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skb_put(skb, len);
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skb->protocol = eth_type_trans(skb, mac->netdev);
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if ((dp->macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK) {
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skb->ip_summed = CHECKSUM_COMPLETE;
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skb->csum = (dp->macrx & XCT_MACRX_CSUM_M) >>
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XCT_MACRX_CSUM_S;
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} else
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skb->ip_summed = CHECKSUM_NONE;
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mac->stats.rx_bytes += len;
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mac->stats.rx_packets++;
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netif_receive_skb(skb);
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info->dma = 0;
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info->skb = NULL;
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dp->ptr = 0;
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dp->macrx = 0;
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}
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|
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mac->rx->next_to_clean += count;
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pasemi_mac_replenish_rx_ring(mac->netdev);
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|
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spin_unlock(&mac->rx->lock);
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return count;
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}
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|
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static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
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{
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int i;
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struct pasemi_mac_buffer *info;
|
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struct pas_dma_xct_descr *dp;
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int start, count;
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int flags;
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spin_lock_irqsave(&mac->tx->lock, flags);
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start = mac->tx->next_to_clean;
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count = 0;
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for (i = start; i < mac->tx->next_to_use; i++) {
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dp = &TX_DESC(mac, i);
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if (!dp || (dp->mactx & XCT_MACTX_O))
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break;
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count++;
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info = &TX_DESC_INFO(mac, i);
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pci_unmap_single(mac->dma_pdev, info->dma,
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info->skb->len, PCI_DMA_TODEVICE);
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dev_kfree_skb_irq(info->skb);
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info->skb = NULL;
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info->dma = 0;
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dp->mactx = 0;
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dp->ptr = 0;
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}
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mac->tx->next_to_clean += count;
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spin_unlock_irqrestore(&mac->tx->lock, flags);
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|
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netif_wake_queue(mac->netdev);
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return count;
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}
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|
|
|
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static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
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{
|
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struct net_device *dev = data;
|
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struct pasemi_mac *mac = netdev_priv(dev);
|
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unsigned int reg;
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|
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if (!(*mac->rx_status & PAS_STATUS_INT))
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return IRQ_NONE;
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|
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netif_rx_schedule(dev);
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pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_COM_TIMEOUTCFG,
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PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0));
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|
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reg = PAS_IOB_DMA_RXCH_RESET_PINTC | PAS_IOB_DMA_RXCH_RESET_SINTC |
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PAS_IOB_DMA_RXCH_RESET_DINTC;
|
|
if (*mac->rx_status & PAS_STATUS_TIMER)
|
|
reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
|
|
|
|
pci_write_config_dword(mac->iob_pdev,
|
|
PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
|
|
{
|
|
struct net_device *dev = data;
|
|
struct pasemi_mac *mac = netdev_priv(dev);
|
|
unsigned int reg;
|
|
|
|
if (!(*mac->tx_status & PAS_STATUS_INT))
|
|
return IRQ_NONE;
|
|
|
|
pasemi_mac_clean_tx(mac);
|
|
|
|
reg = PAS_IOB_DMA_TXCH_RESET_PINTC | PAS_IOB_DMA_TXCH_RESET_SINTC;
|
|
if (*mac->tx_status & PAS_STATUS_TIMER)
|
|
reg |= PAS_IOB_DMA_TXCH_RESET_TINTC;
|
|
|
|
pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch),
|
|
reg);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int pasemi_mac_open(struct net_device *dev)
|
|
{
|
|
struct pasemi_mac *mac = netdev_priv(dev);
|
|
unsigned int flags;
|
|
int ret;
|
|
|
|
/* enable rx section */
|
|
pci_write_config_dword(mac->dma_pdev, PAS_DMA_COM_RXCMD,
|
|
PAS_DMA_COM_RXCMD_EN);
|
|
|
|
/* enable tx section */
|
|
pci_write_config_dword(mac->dma_pdev, PAS_DMA_COM_TXCMD,
|
|
PAS_DMA_COM_TXCMD_EN);
|
|
|
|
flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
|
|
PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
|
|
PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
|
|
|
|
pci_write_config_dword(mac->pdev, PAS_MAC_CFG_TXP, flags);
|
|
|
|
flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
|
|
PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
|
|
|
|
flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
|
|
|
|
pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
|
|
PAS_IOB_DMA_RXCH_CFG_CNTTH(30));
|
|
|
|
pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_COM_TIMEOUTCFG,
|
|
PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(1000000));
|
|
|
|
pci_write_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, flags);
|
|
|
|
ret = pasemi_mac_setup_rx_resources(dev);
|
|
if (ret)
|
|
goto out_rx_resources;
|
|
|
|
ret = pasemi_mac_setup_tx_resources(dev);
|
|
if (ret)
|
|
goto out_tx_resources;
|
|
|
|
pci_write_config_dword(mac->pdev, PAS_MAC_IPC_CHNL,
|
|
PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
|
|
PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
|
|
|
|
/* enable rx if */
|
|
pci_write_config_dword(mac->dma_pdev,
|
|
PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
|
|
PAS_DMA_RXINT_RCMDSTA_EN);
|
|
|
|
/* enable rx channel */
|
|
pci_write_config_dword(mac->dma_pdev,
|
|
PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
|
|
PAS_DMA_RXCHAN_CCMDSTA_EN |
|
|
PAS_DMA_RXCHAN_CCMDSTA_DU);
|
|
|
|
/* enable tx channel */
|
|
pci_write_config_dword(mac->dma_pdev,
|
|
PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
|
|
PAS_DMA_TXCHAN_TCMDSTA_EN);
|
|
|
|
pasemi_mac_replenish_rx_ring(dev);
|
|
|
|
netif_start_queue(dev);
|
|
netif_poll_enable(dev);
|
|
|
|
ret = request_irq(mac->dma_pdev->irq + mac->dma_txch,
|
|
&pasemi_mac_tx_intr, IRQF_DISABLED,
|
|
mac->tx->irq_name, dev);
|
|
if (ret) {
|
|
dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
|
|
mac->dma_pdev->irq + mac->dma_txch, ret);
|
|
goto out_tx_int;
|
|
}
|
|
|
|
ret = request_irq(mac->dma_pdev->irq + 20 + mac->dma_rxch,
|
|
&pasemi_mac_rx_intr, IRQF_DISABLED,
|
|
mac->rx->irq_name, dev);
|
|
if (ret) {
|
|
dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
|
|
mac->dma_pdev->irq + 20 + mac->dma_rxch, ret);
|
|
goto out_rx_int;
|
|
}
|
|
|
|
return 0;
|
|
|
|
out_rx_int:
|
|
free_irq(mac->dma_pdev->irq + mac->dma_txch, dev);
|
|
out_tx_int:
|
|
netif_poll_disable(dev);
|
|
netif_stop_queue(dev);
|
|
pasemi_mac_free_tx_resources(dev);
|
|
out_tx_resources:
|
|
pasemi_mac_free_rx_resources(dev);
|
|
out_rx_resources:
|
|
|
|
return ret;
|
|
}
|
|
|
|
#define MAX_RETRIES 5000
|
|
|
|
static int pasemi_mac_close(struct net_device *dev)
|
|
{
|
|
struct pasemi_mac *mac = netdev_priv(dev);
|
|
unsigned int stat;
|
|
int retries;
|
|
|
|
netif_stop_queue(dev);
|
|
|
|
/* Clean out any pending buffers */
|
|
pasemi_mac_clean_tx(mac);
|
|
pasemi_mac_clean_rx(mac, RX_RING_SIZE);
|
|
|
|
/* Disable interface */
|
|
pci_write_config_dword(mac->dma_pdev,
|
|
PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
|
|
PAS_DMA_TXCHAN_TCMDSTA_ST);
|
|
pci_write_config_dword(mac->dma_pdev,
|
|
PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
|
|
PAS_DMA_RXINT_RCMDSTA_ST);
|
|
pci_write_config_dword(mac->dma_pdev,
|
|
PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
|
|
PAS_DMA_RXCHAN_CCMDSTA_ST);
|
|
|
|
for (retries = 0; retries < MAX_RETRIES; retries++) {
|
|
pci_read_config_dword(mac->dma_pdev,
|
|
PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
|
|
&stat);
|
|
if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT))
|
|
break;
|
|
cond_resched();
|
|
}
|
|
|
|
if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
|
|
dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
|
|
|
|
for (retries = 0; retries < MAX_RETRIES; retries++) {
|
|
pci_read_config_dword(mac->dma_pdev,
|
|
PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
|
|
&stat);
|
|
if (!(stat & PAS_DMA_RXCHAN_CCMDSTA_ACT))
|
|
break;
|
|
cond_resched();
|
|
}
|
|
|
|
if (stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)
|
|
dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
|
|
|
|
for (retries = 0; retries < MAX_RETRIES; retries++) {
|
|
pci_read_config_dword(mac->dma_pdev,
|
|
PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
|
|
&stat);
|
|
if (!(stat & PAS_DMA_RXINT_RCMDSTA_ACT))
|
|
break;
|
|
cond_resched();
|
|
}
|
|
|
|
if (stat & PAS_DMA_RXINT_RCMDSTA_ACT)
|
|
dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
|
|
|
|
/* Then, disable the channel. This must be done separately from
|
|
* stopping, since you can't disable when active.
|
|
*/
|
|
|
|
pci_write_config_dword(mac->dma_pdev,
|
|
PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
|
|
pci_write_config_dword(mac->dma_pdev,
|
|
PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
|
|
pci_write_config_dword(mac->dma_pdev,
|
|
PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
|
|
|
|
free_irq(mac->dma_pdev->irq + mac->dma_txch, dev);
|
|
free_irq(mac->dma_pdev->irq + 20 + mac->dma_rxch, dev);
|
|
|
|
/* Free resources */
|
|
pasemi_mac_free_rx_resources(dev);
|
|
pasemi_mac_free_tx_resources(dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
|
|
{
|
|
struct pasemi_mac *mac = netdev_priv(dev);
|
|
struct pasemi_mac_txring *txring;
|
|
struct pasemi_mac_buffer *info;
|
|
struct pas_dma_xct_descr *dp;
|
|
u64 dflags;
|
|
dma_addr_t map;
|
|
int flags;
|
|
|
|
dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_SS | XCT_MACTX_CRC_PAD;
|
|
|
|
if (skb->ip_summed == CHECKSUM_PARTIAL) {
|
|
const unsigned char *nh = skb_network_header(skb);
|
|
|
|
switch (ip_hdr(skb)->protocol) {
|
|
case IPPROTO_TCP:
|
|
dflags |= XCT_MACTX_CSUM_TCP;
|
|
dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
|
|
dflags |= XCT_MACTX_IPO(nh - skb->data);
|
|
break;
|
|
case IPPROTO_UDP:
|
|
dflags |= XCT_MACTX_CSUM_UDP;
|
|
dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
|
|
dflags |= XCT_MACTX_IPO(nh - skb->data);
|
|
break;
|
|
}
|
|
}
|
|
|
|
map = pci_map_single(mac->dma_pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
|
|
|
|
if (dma_mapping_error(map))
|
|
return NETDEV_TX_BUSY;
|
|
|
|
txring = mac->tx;
|
|
|
|
spin_lock_irqsave(&txring->lock, flags);
|
|
|
|
if (txring->next_to_clean - txring->next_to_use == TX_RING_SIZE) {
|
|
spin_unlock_irqrestore(&txring->lock, flags);
|
|
pasemi_mac_clean_tx(mac);
|
|
spin_lock_irqsave(&txring->lock, flags);
|
|
|
|
if (txring->next_to_clean - txring->next_to_use ==
|
|
TX_RING_SIZE) {
|
|
/* Still no room -- stop the queue and wait for tx
|
|
* intr when there's room.
|
|
*/
|
|
netif_stop_queue(dev);
|
|
goto out_err;
|
|
}
|
|
}
|
|
|
|
|
|
dp = &TX_DESC(mac, txring->next_to_use);
|
|
info = &TX_DESC_INFO(mac, txring->next_to_use);
|
|
|
|
dp->mactx = dflags | XCT_MACTX_LLEN(skb->len);
|
|
dp->ptr = XCT_PTR_LEN(skb->len) | XCT_PTR_ADDR(map);
|
|
info->dma = map;
|
|
info->skb = skb;
|
|
|
|
txring->next_to_use++;
|
|
mac->stats.tx_packets++;
|
|
mac->stats.tx_bytes += skb->len;
|
|
|
|
spin_unlock_irqrestore(&txring->lock, flags);
|
|
|
|
pci_write_config_dword(mac->dma_pdev,
|
|
PAS_DMA_TXCHAN_INCR(mac->dma_txch), 1);
|
|
|
|
return NETDEV_TX_OK;
|
|
|
|
out_err:
|
|
spin_unlock_irqrestore(&txring->lock, flags);
|
|
pci_unmap_single(mac->dma_pdev, map, skb->len, PCI_DMA_TODEVICE);
|
|
return NETDEV_TX_BUSY;
|
|
}
|
|
|
|
static struct net_device_stats *pasemi_mac_get_stats(struct net_device *dev)
|
|
{
|
|
struct pasemi_mac *mac = netdev_priv(dev);
|
|
|
|
return &mac->stats;
|
|
}
|
|
|
|
static void pasemi_mac_set_rx_mode(struct net_device *dev)
|
|
{
|
|
struct pasemi_mac *mac = netdev_priv(dev);
|
|
unsigned int flags;
|
|
|
|
pci_read_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, &flags);
|
|
|
|
/* Set promiscuous */
|
|
if (dev->flags & IFF_PROMISC)
|
|
flags |= PAS_MAC_CFG_PCFG_PR;
|
|
else
|
|
flags &= ~PAS_MAC_CFG_PCFG_PR;
|
|
|
|
pci_write_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, flags);
|
|
}
|
|
|
|
|
|
static int pasemi_mac_poll(struct net_device *dev, int *budget)
|
|
{
|
|
int pkts, limit = min(*budget, dev->quota);
|
|
struct pasemi_mac *mac = netdev_priv(dev);
|
|
|
|
pkts = pasemi_mac_clean_rx(mac, limit);
|
|
|
|
if (pkts < limit) {
|
|
/* all done, no more packets present */
|
|
netif_rx_complete(dev);
|
|
|
|
/* re-enable receive interrupts */
|
|
pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_COM_TIMEOUTCFG,
|
|
PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(1000000));
|
|
return 0;
|
|
} else {
|
|
/* used up our quantum, so reschedule */
|
|
dev->quota -= pkts;
|
|
*budget -= pkts;
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
static int __devinit
|
|
pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|
{
|
|
static int index = 0;
|
|
struct net_device *dev;
|
|
struct pasemi_mac *mac;
|
|
int err;
|
|
|
|
err = pci_enable_device(pdev);
|
|
if (err)
|
|
return err;
|
|
|
|
dev = alloc_etherdev(sizeof(struct pasemi_mac));
|
|
if (dev == NULL) {
|
|
dev_err(&pdev->dev,
|
|
"pasemi_mac: Could not allocate ethernet device.\n");
|
|
err = -ENOMEM;
|
|
goto out_disable_device;
|
|
}
|
|
|
|
SET_MODULE_OWNER(dev);
|
|
pci_set_drvdata(pdev, dev);
|
|
SET_NETDEV_DEV(dev, &pdev->dev);
|
|
|
|
mac = netdev_priv(dev);
|
|
|
|
mac->pdev = pdev;
|
|
mac->netdev = dev;
|
|
mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
|
|
|
|
if (!mac->dma_pdev) {
|
|
dev_err(&pdev->dev, "Can't find DMA Controller\n");
|
|
err = -ENODEV;
|
|
goto out_free_netdev;
|
|
}
|
|
|
|
mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
|
|
|
|
if (!mac->iob_pdev) {
|
|
dev_err(&pdev->dev, "Can't find I/O Bridge\n");
|
|
err = -ENODEV;
|
|
goto out_put_dma_pdev;
|
|
}
|
|
|
|
/* These should come out of the device tree eventually */
|
|
mac->dma_txch = index;
|
|
mac->dma_rxch = index;
|
|
|
|
/* We probe GMAC before XAUI, but the DMA interfaces are
|
|
* in XAUI, GMAC order.
|
|
*/
|
|
if (index < 4)
|
|
mac->dma_if = index + 2;
|
|
else
|
|
mac->dma_if = index - 4;
|
|
index++;
|
|
|
|
switch (pdev->device) {
|
|
case 0xa005:
|
|
mac->type = MAC_TYPE_GMAC;
|
|
break;
|
|
case 0xa006:
|
|
mac->type = MAC_TYPE_XAUI;
|
|
break;
|
|
default:
|
|
err = -ENODEV;
|
|
goto out;
|
|
}
|
|
|
|
/* get mac addr from device tree */
|
|
if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
|
|
err = -ENODEV;
|
|
goto out;
|
|
}
|
|
memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
|
|
|
|
dev->open = pasemi_mac_open;
|
|
dev->stop = pasemi_mac_close;
|
|
dev->hard_start_xmit = pasemi_mac_start_tx;
|
|
dev->get_stats = pasemi_mac_get_stats;
|
|
dev->set_multicast_list = pasemi_mac_set_rx_mode;
|
|
dev->weight = 64;
|
|
dev->poll = pasemi_mac_poll;
|
|
dev->features = NETIF_F_HW_CSUM;
|
|
|
|
/* The dma status structure is located in the I/O bridge, and
|
|
* is cache coherent.
|
|
*/
|
|
if (!dma_status)
|
|
/* XXXOJN This should come from the device tree */
|
|
dma_status = __ioremap(0xfd800000, 0x1000, 0);
|
|
|
|
mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
|
|
mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
|
|
|
|
err = register_netdev(dev);
|
|
|
|
if (err) {
|
|
dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
|
|
err);
|
|
goto out;
|
|
} else
|
|
printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
|
|
"hw addr %02x:%02x:%02x:%02x:%02x:%02x\n",
|
|
dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
|
|
mac->dma_if, mac->dma_txch, mac->dma_rxch,
|
|
dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
|
|
dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
|
|
|
|
return err;
|
|
|
|
out:
|
|
pci_dev_put(mac->iob_pdev);
|
|
out_put_dma_pdev:
|
|
pci_dev_put(mac->dma_pdev);
|
|
out_free_netdev:
|
|
free_netdev(dev);
|
|
out_disable_device:
|
|
pci_disable_device(pdev);
|
|
return err;
|
|
|
|
}
|
|
|
|
static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
|
|
{
|
|
struct net_device *netdev = pci_get_drvdata(pdev);
|
|
struct pasemi_mac *mac;
|
|
|
|
if (!netdev)
|
|
return;
|
|
|
|
mac = netdev_priv(netdev);
|
|
|
|
unregister_netdev(netdev);
|
|
|
|
pci_disable_device(pdev);
|
|
pci_dev_put(mac->dma_pdev);
|
|
pci_dev_put(mac->iob_pdev);
|
|
|
|
pci_set_drvdata(pdev, NULL);
|
|
free_netdev(netdev);
|
|
}
|
|
|
|
static struct pci_device_id pasemi_mac_pci_tbl[] = {
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
|
|
|
|
static struct pci_driver pasemi_mac_driver = {
|
|
.name = "pasemi_mac",
|
|
.id_table = pasemi_mac_pci_tbl,
|
|
.probe = pasemi_mac_probe,
|
|
.remove = __devexit_p(pasemi_mac_remove),
|
|
};
|
|
|
|
static void __exit pasemi_mac_cleanup_module(void)
|
|
{
|
|
pci_unregister_driver(&pasemi_mac_driver);
|
|
__iounmap(dma_status);
|
|
dma_status = NULL;
|
|
}
|
|
|
|
int pasemi_mac_init_module(void)
|
|
{
|
|
return pci_register_driver(&pasemi_mac_driver);
|
|
}
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
|
|
MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
|
|
|
|
module_init(pasemi_mac_init_module);
|
|
module_exit(pasemi_mac_cleanup_module);
|