forked from luck/tmp_suning_uos_patched
cb849fc5f0
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation the gpl this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license version 2 gplv2 for more details you should have received a copy of the gnu general public license version 2 gplv2 along with this source code extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 16 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081201.771169395@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
105 lines
2.5 KiB
C
105 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
/*
|
|
* Copyright 2016 Broadcom
|
|
*/
|
|
|
|
#ifndef __SPI_BCM_QSPI_H__
|
|
#define __SPI_BCM_QSPI_H__
|
|
|
|
#include <linux/types.h>
|
|
#include <linux/io.h>
|
|
|
|
/* BSPI interrupt masks */
|
|
#define INTR_BSPI_LR_OVERREAD_MASK BIT(4)
|
|
#define INTR_BSPI_LR_SESSION_DONE_MASK BIT(3)
|
|
#define INTR_BSPI_LR_IMPATIENT_MASK BIT(2)
|
|
#define INTR_BSPI_LR_SESSION_ABORTED_MASK BIT(1)
|
|
#define INTR_BSPI_LR_FULLNESS_REACHED_MASK BIT(0)
|
|
|
|
#define BSPI_LR_INTERRUPTS_DATA \
|
|
(INTR_BSPI_LR_SESSION_DONE_MASK | \
|
|
INTR_BSPI_LR_FULLNESS_REACHED_MASK)
|
|
|
|
#define BSPI_LR_INTERRUPTS_ERROR \
|
|
(INTR_BSPI_LR_OVERREAD_MASK | \
|
|
INTR_BSPI_LR_IMPATIENT_MASK | \
|
|
INTR_BSPI_LR_SESSION_ABORTED_MASK)
|
|
|
|
#define BSPI_LR_INTERRUPTS_ALL \
|
|
(BSPI_LR_INTERRUPTS_ERROR | \
|
|
BSPI_LR_INTERRUPTS_DATA)
|
|
|
|
/* MSPI Interrupt masks */
|
|
#define INTR_MSPI_HALTED_MASK BIT(6)
|
|
#define INTR_MSPI_DONE_MASK BIT(5)
|
|
|
|
#define MSPI_INTERRUPTS_ALL \
|
|
(INTR_MSPI_DONE_MASK | \
|
|
INTR_MSPI_HALTED_MASK)
|
|
|
|
#define QSPI_INTERRUPTS_ALL \
|
|
(MSPI_INTERRUPTS_ALL | \
|
|
BSPI_LR_INTERRUPTS_ALL)
|
|
|
|
struct platform_device;
|
|
struct dev_pm_ops;
|
|
|
|
enum {
|
|
MSPI_DONE = 0x1,
|
|
BSPI_DONE = 0x2,
|
|
BSPI_ERR = 0x4,
|
|
MSPI_BSPI_DONE = 0x7
|
|
};
|
|
|
|
struct bcm_qspi_soc_intc {
|
|
void (*bcm_qspi_int_ack)(struct bcm_qspi_soc_intc *soc_intc, int type);
|
|
void (*bcm_qspi_int_set)(struct bcm_qspi_soc_intc *soc_intc, int type,
|
|
bool en);
|
|
u32 (*bcm_qspi_get_int_status)(struct bcm_qspi_soc_intc *soc_intc);
|
|
};
|
|
|
|
/* Read controller register*/
|
|
static inline u32 bcm_qspi_readl(bool be, void __iomem *addr)
|
|
{
|
|
if (be)
|
|
return ioread32be(addr);
|
|
else
|
|
return readl_relaxed(addr);
|
|
}
|
|
|
|
/* Write controller register*/
|
|
static inline void bcm_qspi_writel(bool be,
|
|
unsigned int data, void __iomem *addr)
|
|
{
|
|
if (be)
|
|
iowrite32be(data, addr);
|
|
else
|
|
writel_relaxed(data, addr);
|
|
}
|
|
|
|
static inline u32 get_qspi_mask(int type)
|
|
{
|
|
switch (type) {
|
|
case MSPI_DONE:
|
|
return INTR_MSPI_DONE_MASK;
|
|
case BSPI_DONE:
|
|
return BSPI_LR_INTERRUPTS_ALL;
|
|
case MSPI_BSPI_DONE:
|
|
return QSPI_INTERRUPTS_ALL;
|
|
case BSPI_ERR:
|
|
return BSPI_LR_INTERRUPTS_ERROR;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* The common driver functions to be called by the SoC platform driver */
|
|
int bcm_qspi_probe(struct platform_device *pdev,
|
|
struct bcm_qspi_soc_intc *soc_intc);
|
|
int bcm_qspi_remove(struct platform_device *pdev);
|
|
|
|
/* pm_ops used by the SoC platform driver called on PM suspend/resume */
|
|
extern const struct dev_pm_ops bcm_qspi_pm_ops;
|
|
|
|
#endif /* __SPI_BCM_QSPI_H__ */
|