forked from luck/tmp_suning_uos_patched
c277835723
The function pci_osc_support_set() traverses every root bridge when checking for _OSC support for a capability. It quits as soon as it finds a device/bridge that doesn't support the requested capability. This won't work for systems that have mixed PCI and PCIe bridges when checking for PCIe features. I split this function into two -- pci_osc_support_set() and pcie_osc_support_set(). The latter is used when only PCIe devices should be traversed. Signed-off-by: Andrew Patterson <andrew.patterson@hp.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
72 lines
2.0 KiB
C
72 lines
2.0 KiB
C
/*
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* File pci-acpi.h
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*
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* Copyright (C) 2004 Intel
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* Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
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*/
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#ifndef _PCI_ACPI_H_
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#define _PCI_ACPI_H_
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#define OSC_QUERY_TYPE 0
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#define OSC_SUPPORT_TYPE 1
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#define OSC_CONTROL_TYPE 2
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#define OSC_SUPPORT_MASKS 0x1f
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/*
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* _OSC DW0 Definition
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*/
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#define OSC_QUERY_ENABLE 1
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#define OSC_REQUEST_ERROR 2
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#define OSC_INVALID_UUID_ERROR 4
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#define OSC_INVALID_REVISION_ERROR 8
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#define OSC_CAPABILITIES_MASK_ERROR 16
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/*
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* _OSC DW1 Definition (OS Support Fields)
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*/
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#define OSC_EXT_PCI_CONFIG_SUPPORT 1
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#define OSC_ACTIVE_STATE_PWR_SUPPORT 2
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#define OSC_CLOCK_PWR_CAPABILITY_SUPPORT 4
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#define OSC_PCI_SEGMENT_GROUPS_SUPPORT 8
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#define OSC_MSI_SUPPORT 16
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/*
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* _OSC DW1 Definition (OS Control Fields)
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*/
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#define OSC_PCI_EXPRESS_NATIVE_HP_CONTROL 1
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#define OSC_SHPC_NATIVE_HP_CONTROL 2
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#define OSC_PCI_EXPRESS_PME_CONTROL 4
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#define OSC_PCI_EXPRESS_AER_CONTROL 8
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#define OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL 16
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#define OSC_CONTROL_MASKS (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL | \
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OSC_SHPC_NATIVE_HP_CONTROL | \
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OSC_PCI_EXPRESS_PME_CONTROL | \
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OSC_PCI_EXPRESS_AER_CONTROL | \
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OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL)
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#ifdef CONFIG_ACPI
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extern acpi_status pci_osc_control_set(acpi_handle handle, u32 flags);
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extern acpi_status __pci_osc_support_set(u32 flags, const char *hid);
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static inline acpi_status pci_osc_support_set(u32 flags)
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{
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return __pci_osc_support_set(flags, PCI_ROOT_HID_STRING);
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}
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static inline acpi_status pcie_osc_support_set(u32 flags)
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{
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return __pci_osc_support_set(flags, PCI_EXPRESS_ROOT_HID_STRING);
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}
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#else
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#if !defined(AE_ERROR)
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typedef u32 acpi_status;
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#define AE_ERROR (acpi_status) (0x0001)
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#endif
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static inline acpi_status pci_osc_control_set(acpi_handle handle, u32 flags)
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{return AE_ERROR;}
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static inline acpi_status pci_osc_support_set(u32 flags) {return AE_ERROR;}
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static inline acpi_status pcie_osc_support_set(u32 flags) {return AE_ERROR;}
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#endif
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#endif /* _PCI_ACPI_H_ */
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