forked from luck/tmp_suning_uos_patched
754ce4f299
Driver for the Atmel on-chip SPI master controller. Tested primarily on AVR32/AT32AP7000/ATSTK1000 using mtd_dataflash and the jffs2 filesystem. Should also work fine on various AT91 ARM-based chips like AT91SAM926x and AT91RM9200. Hardware documentation can be found in the AT32AP7000 data sheet, or its AT91 siblings, which can be downloaded from http://www.atmel.com/dyn/products/datasheets.asp?family_id=682 Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
168 lines
4.3 KiB
C
168 lines
4.3 KiB
C
/*
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* Register definitions for Atmel Serial Peripheral Interface (SPI)
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*
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* Copyright (C) 2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ATMEL_SPI_H__
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#define __ATMEL_SPI_H__
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/* SPI register offsets */
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#define SPI_CR 0x0000
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#define SPI_MR 0x0004
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#define SPI_RDR 0x0008
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#define SPI_TDR 0x000c
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#define SPI_SR 0x0010
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#define SPI_IER 0x0014
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#define SPI_IDR 0x0018
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#define SPI_IMR 0x001c
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#define SPI_CSR0 0x0030
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#define SPI_CSR1 0x0034
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#define SPI_CSR2 0x0038
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#define SPI_CSR3 0x003c
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#define SPI_RPR 0x0100
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#define SPI_RCR 0x0104
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#define SPI_TPR 0x0108
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#define SPI_TCR 0x010c
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#define SPI_RNPR 0x0110
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#define SPI_RNCR 0x0114
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#define SPI_TNPR 0x0118
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#define SPI_TNCR 0x011c
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#define SPI_PTCR 0x0120
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#define SPI_PTSR 0x0124
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/* Bitfields in CR */
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#define SPI_SPIEN_OFFSET 0
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#define SPI_SPIEN_SIZE 1
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#define SPI_SPIDIS_OFFSET 1
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#define SPI_SPIDIS_SIZE 1
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#define SPI_SWRST_OFFSET 7
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#define SPI_SWRST_SIZE 1
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#define SPI_LASTXFER_OFFSET 24
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#define SPI_LASTXFER_SIZE 1
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/* Bitfields in MR */
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#define SPI_MSTR_OFFSET 0
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#define SPI_MSTR_SIZE 1
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#define SPI_PS_OFFSET 1
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#define SPI_PS_SIZE 1
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#define SPI_PCSDEC_OFFSET 2
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#define SPI_PCSDEC_SIZE 1
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#define SPI_FDIV_OFFSET 3
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#define SPI_FDIV_SIZE 1
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#define SPI_MODFDIS_OFFSET 4
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#define SPI_MODFDIS_SIZE 1
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#define SPI_LLB_OFFSET 7
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#define SPI_LLB_SIZE 1
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#define SPI_PCS_OFFSET 16
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#define SPI_PCS_SIZE 4
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#define SPI_DLYBCS_OFFSET 24
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#define SPI_DLYBCS_SIZE 8
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/* Bitfields in RDR */
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#define SPI_RD_OFFSET 0
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#define SPI_RD_SIZE 16
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/* Bitfields in TDR */
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#define SPI_TD_OFFSET 0
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#define SPI_TD_SIZE 16
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/* Bitfields in SR */
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#define SPI_RDRF_OFFSET 0
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#define SPI_RDRF_SIZE 1
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#define SPI_TDRE_OFFSET 1
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#define SPI_TDRE_SIZE 1
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#define SPI_MODF_OFFSET 2
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#define SPI_MODF_SIZE 1
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#define SPI_OVRES_OFFSET 3
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#define SPI_OVRES_SIZE 1
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#define SPI_ENDRX_OFFSET 4
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#define SPI_ENDRX_SIZE 1
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#define SPI_ENDTX_OFFSET 5
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#define SPI_ENDTX_SIZE 1
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#define SPI_RXBUFF_OFFSET 6
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#define SPI_RXBUFF_SIZE 1
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#define SPI_TXBUFE_OFFSET 7
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#define SPI_TXBUFE_SIZE 1
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#define SPI_NSSR_OFFSET 8
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#define SPI_NSSR_SIZE 1
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#define SPI_TXEMPTY_OFFSET 9
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#define SPI_TXEMPTY_SIZE 1
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#define SPI_SPIENS_OFFSET 16
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#define SPI_SPIENS_SIZE 1
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/* Bitfields in CSR0 */
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#define SPI_CPOL_OFFSET 0
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#define SPI_CPOL_SIZE 1
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#define SPI_NCPHA_OFFSET 1
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#define SPI_NCPHA_SIZE 1
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#define SPI_CSAAT_OFFSET 3
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#define SPI_CSAAT_SIZE 1
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#define SPI_BITS_OFFSET 4
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#define SPI_BITS_SIZE 4
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#define SPI_SCBR_OFFSET 8
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#define SPI_SCBR_SIZE 8
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#define SPI_DLYBS_OFFSET 16
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#define SPI_DLYBS_SIZE 8
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#define SPI_DLYBCT_OFFSET 24
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#define SPI_DLYBCT_SIZE 8
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/* Bitfields in RCR */
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#define SPI_RXCTR_OFFSET 0
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#define SPI_RXCTR_SIZE 16
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/* Bitfields in TCR */
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#define SPI_TXCTR_OFFSET 0
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#define SPI_TXCTR_SIZE 16
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/* Bitfields in RNCR */
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#define SPI_RXNCR_OFFSET 0
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#define SPI_RXNCR_SIZE 16
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/* Bitfields in TNCR */
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#define SPI_TXNCR_OFFSET 0
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#define SPI_TXNCR_SIZE 16
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/* Bitfields in PTCR */
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#define SPI_RXTEN_OFFSET 0
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#define SPI_RXTEN_SIZE 1
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#define SPI_RXTDIS_OFFSET 1
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#define SPI_RXTDIS_SIZE 1
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#define SPI_TXTEN_OFFSET 8
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#define SPI_TXTEN_SIZE 1
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#define SPI_TXTDIS_OFFSET 9
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#define SPI_TXTDIS_SIZE 1
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/* Constants for BITS */
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#define SPI_BITS_8_BPT 0
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#define SPI_BITS_9_BPT 1
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#define SPI_BITS_10_BPT 2
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#define SPI_BITS_11_BPT 3
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#define SPI_BITS_12_BPT 4
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#define SPI_BITS_13_BPT 5
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#define SPI_BITS_14_BPT 6
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#define SPI_BITS_15_BPT 7
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#define SPI_BITS_16_BPT 8
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/* Bit manipulation macros */
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#define SPI_BIT(name) \
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(1 << SPI_##name##_OFFSET)
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#define SPI_BF(name,value) \
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(((value) & ((1 << SPI_##name##_SIZE) - 1)) << SPI_##name##_OFFSET)
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#define SPI_BFEXT(name,value) \
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(((value) >> SPI_##name##_OFFSET) & ((1 << SPI_##name##_SIZE) - 1))
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#define SPI_BFINS(name,value,old) \
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( ((old) & ~(((1 << SPI_##name##_SIZE) - 1) << SPI_##name##_OFFSET)) \
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| SPI_BF(name,value))
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/* Register access macros */
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#define spi_readl(port,reg) \
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__raw_readl((port)->regs + SPI_##reg)
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#define spi_writel(port,reg,value) \
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__raw_writel((value), (port)->regs + SPI_##reg)
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#endif /* __ATMEL_SPI_H__ */
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