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kernel_optimize_test/drivers/net/phy/broadcom.c
Paul Gortmaker b1394f961a PHY: add BCM5464 support to broadcom PHY driver 
The BCM5464 can be used with the current broadcom PHY driver
by just adding the appropriate chip ID and using the existing
support within.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-04-17 15:31:32 -04:00

271 lines
7.5 KiB
C
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/*
* drivers/net/phy/broadcom.c
*
* Broadcom BCM5411, BCM5421 and BCM5461 Gigabit Ethernet
* transceivers.
*
* Copyright (c) 2006 Maciej W. Rozycki
*
* Inspired by code written by Amy Fong.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/module.h>
#include <linux/phy.h>
#define MII_BCM54XX_ECR 0x10 /* BCM54xx extended control register */
#define MII_BCM54XX_ECR_IM 0x1000 /* Interrupt mask */
#define MII_BCM54XX_ECR_IF 0x0800 /* Interrupt force */
#define MII_BCM54XX_ESR 0x11 /* BCM54xx extended status register */
#define MII_BCM54XX_ESR_IS 0x1000 /* Interrupt status */
#define MII_BCM54XX_ISR 0x1a /* BCM54xx interrupt status register */
#define MII_BCM54XX_IMR 0x1b /* BCM54xx interrupt mask register */
#define MII_BCM54XX_INT_CRCERR 0x0001 /* CRC error */
#define MII_BCM54XX_INT_LINK 0x0002 /* Link status changed */
#define MII_BCM54XX_INT_SPEED 0x0004 /* Link speed change */
#define MII_BCM54XX_INT_DUPLEX 0x0008 /* Duplex mode changed */
#define MII_BCM54XX_INT_LRS 0x0010 /* Local receiver status changed */
#define MII_BCM54XX_INT_RRS 0x0020 /* Remote receiver status changed */
#define MII_BCM54XX_INT_SSERR 0x0040 /* Scrambler synchronization error */
#define MII_BCM54XX_INT_UHCD 0x0080 /* Unsupported HCD negotiated */
#define MII_BCM54XX_INT_NHCD 0x0100 /* No HCD */
#define MII_BCM54XX_INT_NHCDL 0x0200 /* No HCD link */
#define MII_BCM54XX_INT_ANPR 0x0400 /* Auto-negotiation page received */
#define MII_BCM54XX_INT_LC 0x0800 /* All counters below 128 */
#define MII_BCM54XX_INT_HC 0x1000 /* Counter above 32768 */
#define MII_BCM54XX_INT_MDIX 0x2000 /* MDIX status change */
#define MII_BCM54XX_INT_PSERR 0x4000 /* Pair swap error */
MODULE_DESCRIPTION("Broadcom PHY driver");
MODULE_AUTHOR("Maciej W. Rozycki");
MODULE_LICENSE("GPL");
static int bcm54xx_config_init(struct phy_device *phydev)
{
int reg, err;
reg = phy_read(phydev, MII_BCM54XX_ECR);
if (reg < 0)
return reg;
/* Mask interrupts globally. */
reg |= MII_BCM54XX_ECR_IM;
err = phy_write(phydev, MII_BCM54XX_ECR, reg);
if (err < 0)
return err;
/* Unmask events we are interested in. */
reg = ~(MII_BCM54XX_INT_DUPLEX |
MII_BCM54XX_INT_SPEED |
MII_BCM54XX_INT_LINK);
err = phy_write(phydev, MII_BCM54XX_IMR, reg);
if (err < 0)
return err;
return 0;
}
static int bcm54xx_ack_interrupt(struct phy_device *phydev)
{
int reg;
/* Clear pending interrupts. */
reg = phy_read(phydev, MII_BCM54XX_ISR);
if (reg < 0)
return reg;
return 0;
}
static int bcm54xx_config_intr(struct phy_device *phydev)
{
int reg, err;
reg = phy_read(phydev, MII_BCM54XX_ECR);
if (reg < 0)
return reg;
if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
reg &= ~MII_BCM54XX_ECR_IM;
else
reg |= MII_BCM54XX_ECR_IM;
err = phy_write(phydev, MII_BCM54XX_ECR, reg);
return err;
}
static int bcm5481_config_aneg(struct phy_device *phydev)
{
int ret;
/* Aneg firsly. */
ret = genphy_config_aneg(phydev);
/* Then we can set up the delay. */
if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
u16 reg;
/*
* There is no BCM5481 specification available, so down
* here is everything we know about "register 0x18". This
* at least helps BCM5481 to successfuly receive packets
* on MPC8360E-RDK board. Peter Barada <peterb@logicpd.com>
* says: "This sets delay between the RXD and RXC signals
* instead of using trace lengths to achieve timing".
*/
/* Set RDX clk delay. */
reg = 0x7 | (0x7 << 12);
phy_write(phydev, 0x18, reg);
reg = phy_read(phydev, 0x18);
/* Set RDX-RXC skew. */
reg |= (1 << 8);
/* Write bits 14:0. */
reg |= (1 << 15);
phy_write(phydev, 0x18, reg);
}
return ret;
}
static struct phy_driver bcm5411_driver = {
.phy_id = 0x00206070,
.phy_id_mask = 0xfffffff0,
.name = "Broadcom BCM5411",
.features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
.config_init = bcm54xx_config_init,
.config_aneg = genphy_config_aneg,
.read_status = genphy_read_status,
.ack_interrupt = bcm54xx_ack_interrupt,
.config_intr = bcm54xx_config_intr,
.driver = { .owner = THIS_MODULE },
};
static struct phy_driver bcm5421_driver = {
.phy_id = 0x002060e0,
.phy_id_mask = 0xfffffff0,
.name = "Broadcom BCM5421",
.features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
.config_init = bcm54xx_config_init,
.config_aneg = genphy_config_aneg,
.read_status = genphy_read_status,
.ack_interrupt = bcm54xx_ack_interrupt,
.config_intr = bcm54xx_config_intr,
.driver = { .owner = THIS_MODULE },
};
static struct phy_driver bcm5461_driver = {
.phy_id = 0x002060c0,
.phy_id_mask = 0xfffffff0,
.name = "Broadcom BCM5461",
.features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
.config_init = bcm54xx_config_init,
.config_aneg = genphy_config_aneg,
.read_status = genphy_read_status,
.ack_interrupt = bcm54xx_ack_interrupt,
.config_intr = bcm54xx_config_intr,
.driver = { .owner = THIS_MODULE },
};
static struct phy_driver bcm5464_driver = {
.phy_id = 0x002060b0,
.phy_id_mask = 0xfffffff0,
.name = "Broadcom BCM5464",
.features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
.config_init = bcm54xx_config_init,
.config_aneg = genphy_config_aneg,
.read_status = genphy_read_status,
.ack_interrupt = bcm54xx_ack_interrupt,
.config_intr = bcm54xx_config_intr,
.driver = { .owner = THIS_MODULE },
};
static struct phy_driver bcm5481_driver = {
.phy_id = 0x0143bca0,
.phy_id_mask = 0xfffffff0,
.name = "Broadcom BCM5481",
.features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
.config_init = bcm54xx_config_init,
.config_aneg = bcm5481_config_aneg,
.read_status = genphy_read_status,
.ack_interrupt = bcm54xx_ack_interrupt,
.config_intr = bcm54xx_config_intr,
.driver = { .owner = THIS_MODULE },
};
static struct phy_driver bcm5482_driver = {
.phy_id = 0x0143bcb0,
.phy_id_mask = 0xfffffff0,
.name = "Broadcom BCM5482",
.features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
.config_init = bcm54xx_config_init,
.config_aneg = genphy_config_aneg,
.read_status = genphy_read_status,
.ack_interrupt = bcm54xx_ack_interrupt,
.config_intr = bcm54xx_config_intr,
.driver = { .owner = THIS_MODULE },
};
static int __init broadcom_init(void)
{
int ret;
ret = phy_driver_register(&bcm5411_driver);
if (ret)
goto out_5411;
ret = phy_driver_register(&bcm5421_driver);
if (ret)
goto out_5421;
ret = phy_driver_register(&bcm5461_driver);
if (ret)
goto out_5461;
ret = phy_driver_register(&bcm5464_driver);
if (ret)
goto out_5464;
ret = phy_driver_register(&bcm5481_driver);
if (ret)
goto out_5481;
ret = phy_driver_register(&bcm5482_driver);
if (ret)
goto out_5482;
return ret;
out_5482:
phy_driver_unregister(&bcm5481_driver);
out_5481:
phy_driver_unregister(&bcm5464_driver);
out_5464:
phy_driver_unregister(&bcm5461_driver);
out_5461:
phy_driver_unregister(&bcm5421_driver);
out_5421:
phy_driver_unregister(&bcm5411_driver);
out_5411:
return ret;
}
static void __exit broadcom_exit(void)
{
phy_driver_unregister(&bcm5482_driver);
phy_driver_unregister(&bcm5481_driver);
phy_driver_unregister(&bcm5464_driver);
phy_driver_unregister(&bcm5461_driver);
phy_driver_unregister(&bcm5421_driver);
phy_driver_unregister(&bcm5411_driver);
}
module_init(broadcom_init);
module_exit(broadcom_exit);
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