forked from luck/tmp_suning_uos_patched
9e83b98a79
Anomaly 05000312 - Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted: DESCRIPTION: When instruction cache is enabled, erroneous behavior may occur when any of the following instructions are interrupted: . CSYNC • SSYNC • LCx = • LTx = (only when LCx is non-zero) • LBx = (only when LCx is non-zero) When this problem occurs, a variety of incorrect things could happen, including an illegal instruction exception. Additional errors could show up as an exception, a hardware error, or an instruction that is valid but different than the one that was expected. WORKAROUND: Place a cli before all SSYNC, CSYNC, "LCx =", "LTx =", and "LBx =" instructions to disable interrupts, and place an sti after each of these instructions to re-enable interrupts. When these instructions are executed in code that is already non-interruptible, the problem will not occur. Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
63 lines
1.3 KiB
C
63 lines
1.3 KiB
C
/*
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* delay.h - delay functions
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*
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* Copyright (c) 2004-2007 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef __ASM_DELAY_H__
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#define __ASM_DELAY_H__
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#include <asm/mach/anomaly.h>
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static inline void __delay(unsigned long loops)
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{
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if (ANOMALY_05000312) {
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/* Interrupted loads to loop registers -> bad */
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unsigned long tmp;
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__asm__ __volatile__(
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"[--SP] = LC0;"
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"[--SP] = LT0;"
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"[--SP] = LB0;"
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"LSETUP (1f,1f) LC0 = %1;"
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"1: NOP;"
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/* We take advantage of the fact that LC0 is 0 at
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* the end of the loop. Otherwise we'd need some
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* NOPs after the CLI here.
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*/
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"CLI %0;"
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"LB0 = [SP++];"
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"LT0 = [SP++];"
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"LC0 = [SP++];"
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"STI %0;"
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: "=d" (tmp)
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: "a" (loops)
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);
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} else
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__asm__ __volatile__ (
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"LSETUP(1f, 1f) LC0 = %0;"
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"1: NOP;"
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:
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: "a" (loops)
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: "LT0", "LB0", "LC0"
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);
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}
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#include <linux/param.h> /* needed for HZ */
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/*
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* Use only for very small delays ( < 1 msec). Should probably use a
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* lookup table, really, as the multiplications take much too long with
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* short delays. This is a "reasonable" implementation, though (and the
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* first constant multiplications gets optimized away if the delay is
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* a constant)
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*/
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static inline void udelay(unsigned long usecs)
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{
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extern unsigned long loops_per_jiffy;
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__delay(usecs * loops_per_jiffy / (1000000 / HZ));
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}
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#endif
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