forked from luck/tmp_suning_uos_patched
bdc807871d
When the conversion factor between jiffies and milli- or microseconds is not a single multiply or divide, as for the case of HZ == 300, we currently do a multiply followed by a divide. The intervening result, however, is subject to overflows, especially since the fraction is not simplified (for HZ == 300, we multiply by 300 and divide by 1000). This is exposed to the user when passing a large timeout to poll(), for example. This patch replaces the multiply-divide with a reciprocal multiplication on 32-bit platforms. When the input is an unsigned long, there is no portable way to do this on 64-bit platforms there is no portable way to do this since it requires a 128-bit intermediate result (which gcc does support on 64-bit platforms but may generate libgcc calls, e.g. on 64-bit s390), but since the output is a 32-bit integer in the cases affected, just simplify the multiply-divide (*3/10 instead of *300/1000). The reciprocal multiply used can have off-by-one errors in the upper half of the valid output range. This could be avoided at the expense of having to deal with a potential 65-bit intermediate result. Since the intent is to avoid overflow problems and most of the other time conversions are only semiexact, the off-by-one errors were considered an acceptable tradeoff. At Ralf Baechle's suggestion, this version uses a Perl script to compute the necessary constants. We already have dependencies on Perl for kernel compiles. This does, however, require the Perl module Math::BigInt, which is included in the standard Perl distribution starting with version 5.8.0. In order to support older versions of Perl, include a table of canned constants in the script itself, and structure the script so that Math::BigInt isn't required if pulling values from said table. Running the script requires that the HZ value is available from the Makefile. Thus, this patch also adds the Kconfig variable CONFIG_HZ to the architectures which didn't already have it (alpha, cris, frv, h8300, m32r, m68k, m68knommu, sparc, v850, and xtensa.) It does *not* touch the sh or sh64 architectures, since Paul Mundt has dealt with those separately in the sh tree. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Cc: Ralf Baechle <ralf@linux-mips.org>, Cc: Sam Ravnborg <sam@ravnborg.org>, Cc: Paul Mundt <lethal@linux-sh.org>, Cc: Richard Henderson <rth@twiddle.net>, Cc: Michael Starvik <starvik@axis.com>, Cc: David Howells <dhowells@redhat.com>, Cc: Yoshinori Sato <ysato@users.sourceforge.jp>, Cc: Hirokazu Takata <takata@linux-m32r.org>, Cc: Geert Uytterhoeven <geert@linux-m68k.org>, Cc: Roman Zippel <zippel@linux-m68k.org>, Cc: William L. Irwin <sparclinux@vger.kernel.org>, Cc: Chris Zankel <chris@zankel.net>, Cc: H. Peter Anvin <hpa@zytor.com>, Cc: Jan Engelhardt <jengelh@computergmbh.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
70 lines
2.2 KiB
C
70 lines
2.2 KiB
C
/*
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* include/asm-v850/sim85e2.h -- Machine-dependent defs for
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* V850E2 RTL simulator
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*
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* Copyright (C) 2002,03 NEC Electronics Corporation
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* Copyright (C) 2002,03 Miles Bader <miles@gnu.org>
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*
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* Written by Miles Bader <miles@gnu.org>
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*/
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#ifndef __V850_SIM85E2_H__
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#define __V850_SIM85E2_H__
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#include <asm/v850e2.h> /* Based on V850E2 core. */
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/* Various memory areas supported by the simulator.
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These should match the corresponding definitions in the linker script. */
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/* `instruction RAM'; instruction fetches are much faster from IRAM than
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from DRAM. */
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#define IRAM_ADDR 0
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#define IRAM_SIZE 0x00100000 /* 1MB */
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/* `data RAM', below and contiguous with the I/O space.
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Data fetches are much faster from DRAM than from IRAM. */
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#define DRAM_ADDR 0xfff00000
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#define DRAM_SIZE 0x000ff000 /* 1020KB */
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/* `external ram'. Unlike the above RAM areas, this memory is cached,
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so both instruction and data fetches should be (mostly) fast --
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however, currently only write-through caching is supported, so writes
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to ERAM will be slow. */
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#define ERAM_ADDR 0x00100000
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#define ERAM_SIZE 0x07f00000 /* 127MB (max) */
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/* Dynamic RAM; uses memory controller. */
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#define SDRAM_ADDR 0x10000000
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#define SDRAM_SIZE 0x01000000 /* 16MB */
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/* Simulator specific control registers. */
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/* NOTHAL controls whether the simulator will stop at a `halt' insn. */
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#define SIM85E2_NOTHAL_ADDR 0xffffff22
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#define SIM85E2_NOTHAL (*(volatile u8 *)SIM85E2_NOTHAL_ADDR)
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/* The simulator will stop N cycles after N is written to SIMFIN. */
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#define SIM85E2_SIMFIN_ADDR 0xffffff24
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#define SIM85E2_SIMFIN (*(volatile u16 *)SIM85E2_SIMFIN_ADDR)
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/* For <asm/irq.h> */
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#define NUM_CPU_IRQS 64
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/* For <asm/page.h> */
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#define PAGE_OFFSET SDRAM_ADDR
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/* For <asm/entry.h> */
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/* `R0 RAM', used for a few miscellaneous variables that must be accessible
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using a load instruction relative to R0. The sim85e2 simulator
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actually puts 1020K of RAM from FFF00000 to FFFFF000, so we arbitarily
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choose a small portion at the end of that. */
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#define R0_RAM_ADDR 0xFFFFE000
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#endif /* __V850_SIM85E2_H__ */
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