forked from luck/tmp_suning_uos_patched
178e9fc47a
This patch provide a basic PMU, riscv_base_pmu, which supports two general hardware event, instructions and cycles. Furthermore, this PMU serves as a reference implementation to ease the portings in the future. riscv_base_pmu should be able to run on any RISC-V machine that conforms to the Priv-Spec. Note that the latest qemu model hasn't fully support a proper behavior of Priv-Spec 1.10 yet, but work around should be easy with very small fixes. Please check https://github.com/riscv/riscv-qemu/pull/115 for future updates. Cc: Nick Hu <nickhu@andestech.com> Cc: Greentime Hu <greentime@andestech.com> Signed-off-by: Alan Kao <alankao@andestech.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> |
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.. | ||
vdso | ||
.gitignore | ||
asm-offsets.c | ||
cacheinfo.c | ||
cpu.c | ||
cpufeature.c | ||
entry.S | ||
ftrace.c | ||
head.S | ||
irq.c | ||
Makefile | ||
mcount-dyn.S | ||
mcount.S | ||
module-sections.c | ||
module.c | ||
module.lds | ||
perf_event.c | ||
process.c | ||
ptrace.c | ||
reset.c | ||
riscv_ksyms.c | ||
setup.c | ||
signal.c | ||
smp.c | ||
smpboot.c | ||
stacktrace.c | ||
sys_riscv.c | ||
syscall_table.c | ||
time.c | ||
traps.c | ||
vdso.c | ||
vmlinux.lds.S |