Tony Lindgren 1a5cd7c23c bus: ti-sysc: Enable all clocks directly during init to read revision ... The first thing we want to do is just read the module revision register to be able to configure the module specific quirks and configure the module registers. As the interconnect target module may not yet be properly configured and may need a reset first, we don't want to use pm_runtime_get() at this point. To read the revision register, let's just enable the all the clocks for the interconnect target module during init even if the optional clocks are not needed. That way we can read the revision register to configure the quirks needed for PM runtime. Signed-off-by: Tony Lindgren <tony@atomide.com>		2019-04-03 09:32:34 -07:00
..
fsl-mc
arm-cci.c
brcmstb_gisb.c
da8xx-mstpri.c
hisi_lpc.c
imx-weim.c
Kconfig
Makefile
mips_cdmm.c
mvebu-mbus.c
omap_l3_noc.c
omap_l3_noc.h
omap_l3_smx.c
omap_l3_smx.h
omap-ocp2scp.c
qcom-ebi2.c
simple-pm-bus.c
sun50i-de2.c
sunxi-rsb.c
tegra-aconnect.c
tegra-gmi.c
ti-sysc.c	bus: ti-sysc: Enable all clocks directly during init to read revision	2019-04-03 09:32:34 -07:00
ts-nbus.c
uniphier-system-bus.c
vexpress-config.c