forked from luck/tmp_suning_uos_patched
1beb6a7d6c
This adds some very basic support for the new machines, including the Quad G5 (tested), and other new dual core based machines and iMac G5 iSight (untested). This is still experimental ! There is no thermal control yet, there is no proper handing of MSIs, etc.. but it boots, I have all 4 cores up on my machine. Compared to the previous version of this patch, this one adds DART IOMMU support for the U4 chipset and thus should work fine on setups with more than 2Gb of RAM. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
119 lines
4.1 KiB
C
119 lines
4.1 KiB
C
/*
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* Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
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* Rewrite, cleanup:
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* Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef _ASM_IOMMU_H
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#define _ASM_IOMMU_H
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#include <linux/config.h>
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#include <asm/types.h>
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#include <linux/spinlock.h>
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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/*
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* IOMAP_MAX_ORDER defines the largest contiguous block
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* of dma space we can get. IOMAP_MAX_ORDER = 13
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* allows up to 2**12 pages (4096 * 4096) = 16 MB
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*/
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#define IOMAP_MAX_ORDER 13
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struct iommu_table {
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unsigned long it_busno; /* Bus number this table belongs to */
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unsigned long it_size; /* Size of iommu table in entries */
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unsigned long it_offset; /* Offset into global table */
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unsigned long it_base; /* mapped address of tce table */
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unsigned long it_index; /* which iommu table this is */
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unsigned long it_type; /* type: PCI or Virtual Bus */
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unsigned long it_blocksize; /* Entries in each block (cacheline) */
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unsigned long it_hint; /* Hint for next alloc */
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unsigned long it_largehint; /* Hint for large allocs */
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unsigned long it_halfpoint; /* Breaking point for small/large allocs */
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spinlock_t it_lock; /* Protects it_map */
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unsigned long *it_map; /* A simple allocation bitmap for now */
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};
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struct scatterlist;
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struct device_node;
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#ifdef CONFIG_PPC_MULTIPLATFORM
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/* Walks all buses and creates iommu tables */
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extern void iommu_setup_pSeries(void);
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extern void iommu_setup_dart(void);
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/* Frees table for an individual device node */
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extern void iommu_free_table(struct device_node *dn);
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#endif /* CONFIG_PPC_MULTIPLATFORM */
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#ifdef CONFIG_PPC_PSERIES
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/* Creates table for an individual device node */
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extern void iommu_devnode_init_pSeries(struct device_node *dn);
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#endif /* CONFIG_PPC_PSERIES */
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#ifdef CONFIG_PPC_ISERIES
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/* Creates table for an individual device node */
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extern void iommu_devnode_init_iSeries(struct device_node *dn);
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/* Get table parameters from HV */
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extern void iommu_table_getparms_iSeries(unsigned long busno,
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unsigned char slotno,
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unsigned char virtbus,
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struct iommu_table* tbl);
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#endif /* CONFIG_PPC_ISERIES */
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/* Initializes an iommu_table based in values set in the passed-in
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* structure
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*/
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extern struct iommu_table *iommu_init_table(struct iommu_table * tbl);
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extern int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
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struct scatterlist *sglist, int nelems,
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enum dma_data_direction direction);
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extern void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,
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int nelems, enum dma_data_direction direction);
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extern void *iommu_alloc_coherent(struct iommu_table *tbl, size_t size,
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dma_addr_t *dma_handle, gfp_t flag);
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extern void iommu_free_coherent(struct iommu_table *tbl, size_t size,
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void *vaddr, dma_addr_t dma_handle);
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extern dma_addr_t iommu_map_single(struct iommu_table *tbl, void *vaddr,
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size_t size, enum dma_data_direction direction);
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extern void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction direction);
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extern void iommu_init_early_pSeries(void);
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extern void iommu_init_early_iSeries(void);
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extern void iommu_init_early_dart(void);
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#ifdef CONFIG_PCI
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extern void pci_iommu_init(void);
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extern void pci_direct_iommu_init(void);
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#else
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static inline void pci_iommu_init(void) { }
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#endif
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extern void alloc_dart_table(void);
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#endif /* _ASM_IOMMU_H */
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