forked from luck/tmp_suning_uos_patched
2a10154abc
Add support for the TI dp83867 Gigabit ethernet phy device. The DP83867 is a robust, low power, fully featured Physical Layer transceiver with integrated PMD sublayers to support 10BASE-T, 100BASE-TX and 1000BASE-T Ethernet protocols. Signed-off-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
46 lines
1.5 KiB
C
46 lines
1.5 KiB
C
/*
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* Device Tree constants for the Texas Instruments DP83867 PHY
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*
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* Author: Dan Murphy <dmurphy@ti.com>
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*
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* Copyright: (C) 2015 Texas Instruments, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#ifndef _DT_BINDINGS_TI_DP83867_H
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#define _DT_BINDINGS_TI_DP83867_H
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/* PHY CTRL bits */
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#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB 0x00
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#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB 0x01
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#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB 0x02
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#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB 0x03
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/* RGMIIDCTL internal delay for rx and tx */
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#define DP83867_RGMIIDCTL_250_PS 0x0
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#define DP83867_RGMIIDCTL_500_PS 0x1
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#define DP83867_RGMIIDCTL_750_PS 0x2
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#define DP83867_RGMIIDCTL_1_NS 0x3
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#define DP83867_RGMIIDCTL_1_25_NS 0x4
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#define DP83867_RGMIIDCTL_1_50_NS 0x5
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#define DP83867_RGMIIDCTL_1_75_NS 0x6
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#define DP83867_RGMIIDCTL_2_00_NS 0x7
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#define DP83867_RGMIIDCTL_2_25_NS 0x8
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#define DP83867_RGMIIDCTL_2_50_NS 0x9
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#define DP83867_RGMIIDCTL_2_75_NS 0xa
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#define DP83867_RGMIIDCTL_3_00_NS 0xb
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#define DP83867_RGMIIDCTL_3_25_NS 0xc
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#define DP83867_RGMIIDCTL_3_50_NS 0xd
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#define DP83867_RGMIIDCTL_3_75_NS 0xe
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#define DP83867_RGMIIDCTL_4_00_NS 0xf
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#endif
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