forked from luck/tmp_suning_uos_patched
c1f86f2fde
The Berlin clock documentation was part of the Marvell Berlin SoC documentation because the Berlin clock configuration was inside the chip controller. With the recent rework of the chip and system controller handling (now all sub-devices of the soc and system controller nodes are registred with simple-mfd, and each device has its own sub-node), the documentation of the Berlin clock driver can be moved to the generic clock documentation directory. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
32 lines
986 B
Plaintext
32 lines
986 B
Plaintext
Device Tree Clock bindings for Marvell Berlin
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This binding uses the common clock binding[1].
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[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
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Clock related registers are spread among the chip control registers. Berlin
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clock node should be a sub-node of the chip controller node. Marvell Berlin2
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(BG2, BG2CD, BG2Q) SoCs share the same IP for PLLs and clocks, with some
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minor differences in features and register layout.
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Required properties:
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- compatible: must be "marvell,berlin2-clk" or "marvell,berlin2q-clk"
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- #clock-cells: must be 1
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- clocks: must be the input parent clock phandle
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- clock-names: name of the input parent clock
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Allowed clock-names for the reference clocks are
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"refclk" for the SoCs oscillator input on all SoCs,
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and SoC-specific input clocks for
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BG2/BG2CD: "video_ext0" for the external video clock input
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Example:
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chip_clk: clock {
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compatible = "marvell,berlin2q-clk";
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#clock-cells = <1>;
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clocks = <&refclk>;
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clock-names = "refclk";
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};
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