forked from luck/tmp_suning_uos_patched
0a2796da11
The V4e ColdFire CPU family also has an integrated FPU (as well as the MMU). So add code to support this hardware along side the existing m68k FPU code. The ColdFire FPU is of course different to all previous 68k FP units. It is close in operation to the 68060, but not completely compatible. The biggest issue to deal with is that the ColdFire FPU multi-move instructions are different. It does not support multi-moving the FP control registers, and the multi-move of the FP data registers uses a different instruction mnemonic. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Matt Waddel <mwaddel@yahoo.com> Acked-by: Kurt Mahan <kmahan@xmission.com>
24 lines
496 B
C
24 lines
496 B
C
#ifndef __M68K_FPU_H
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#define __M68K_FPU_H
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/*
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* MAX floating point unit state size (FSAVE/FRESTORE)
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*/
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#if defined(CONFIG_M68020) || defined(CONFIG_M68030)
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#define FPSTATESIZE (216)
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#elif defined(CONFIG_M68040)
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#define FPSTATESIZE (96)
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#elif defined(CONFIG_M68KFPU_EMU)
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#define FPSTATESIZE (28)
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#elif defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU)
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#define FPSTATESIZE (16)
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#elif defined(CONFIG_M68060)
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#define FPSTATESIZE (12)
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#else
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#define FPSTATESIZE (0)
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#endif
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#endif /* __M68K_FPU_H */
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