forked from luck/tmp_suning_uos_patched
2d4dc890b5
Mtdblock driver doesn't call flush_dcache_page for pages in request. So, this causes problems on architectures where the icache doesn't fill from the dcache or with dcache aliases. The patch fixes this. The ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE symbol was introduced to avoid pointless empty cache-thrashing loops on architectures for which flush_dcache_page() is a no-op. Every architecture was provided with this flush pages on architectires where ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE is equal 1 or do nothing otherwise. See "fix mtd_blkdevs problem with caches on some architectures" discussion on LKML for more information. Signed-off-by: Ilya Loginov <isloginov@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Peter Horton <phorton@bitbox.co.uk> Cc: "Ed L. Cashin" <ecashin@coraid.com> Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
93 lines
2.7 KiB
C
93 lines
2.7 KiB
C
#ifndef _M68KNOMMU_CACHEFLUSH_H
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#define _M68KNOMMU_CACHEFLUSH_H
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/*
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* (C) Copyright 2000-2004, Greg Ungerer <gerg@snapgear.com>
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*/
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#include <linux/mm.h>
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#define flush_cache_all() __flush_cache_all()
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#define flush_cache_mm(mm) do { } while (0)
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#define flush_cache_dup_mm(mm) do { } while (0)
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#define flush_cache_range(vma, start, end) __flush_cache_all()
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#define flush_cache_page(vma, vmaddr) do { } while (0)
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#define flush_dcache_range(start,len) __flush_cache_all()
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#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
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#define flush_dcache_page(page) do { } while (0)
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#define flush_dcache_mmap_lock(mapping) do { } while (0)
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#define flush_dcache_mmap_unlock(mapping) do { } while (0)
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#define flush_icache_range(start,len) __flush_cache_all()
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#define flush_icache_page(vma,pg) do { } while (0)
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#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
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#define flush_cache_vmap(start, end) do { } while (0)
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#define flush_cache_vunmap(start, end) do { } while (0)
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#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
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memcpy(dst, src, len)
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#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
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memcpy(dst, src, len)
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static inline void __flush_cache_all(void)
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{
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#ifdef CONFIG_M5407
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/*
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* Use cpushl to push and invalidate all cache lines.
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* Gas doesn't seem to know how to generate the ColdFire
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* cpushl instruction... Oh well, bit stuff it for now.
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*/
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__asm__ __volatile__ (
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"nop\n\t"
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"clrl %%d0\n\t"
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"1:\n\t"
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"movel %%d0,%%a0\n\t"
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"2:\n\t"
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".word 0xf468\n\t"
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"addl #0x10,%%a0\n\t"
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"cmpl #0x00000800,%%a0\n\t"
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"blt 2b\n\t"
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"addql #1,%%d0\n\t"
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"cmpil #4,%%d0\n\t"
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"bne 1b\n\t"
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"movel #0xb6088500,%%d0\n\t"
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"movec %%d0,%%CACR\n\t"
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: : : "d0", "a0" );
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#endif /* CONFIG_M5407 */
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#if defined(CONFIG_M523x) || defined(CONFIG_M527x)
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__asm__ __volatile__ (
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"movel #0x81400100, %%d0\n\t"
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"movec %%d0, %%CACR\n\t"
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"nop\n\t"
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: : : "d0" );
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#endif /* CONFIG_M523x || CONFIG_M527x */
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#if defined(CONFIG_M528x)
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__asm__ __volatile__ (
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"movel #0x81000200, %%d0\n\t"
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"movec %%d0, %%CACR\n\t"
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"nop\n\t"
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: : : "d0" );
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#endif /* CONFIG_M528x */
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#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || defined(CONFIG_M5272)
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__asm__ __volatile__ (
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"movel #0x81000100, %%d0\n\t"
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"movec %%d0, %%CACR\n\t"
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"nop\n\t"
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: : : "d0" );
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#endif /* CONFIG_M5206 || CONFIG_M5206e || CONFIG_M5272 */
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#ifdef CONFIG_M5249
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__asm__ __volatile__ (
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"movel #0xa1000200, %%d0\n\t"
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"movec %%d0, %%CACR\n\t"
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"nop\n\t"
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: : : "d0" );
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#endif /* CONFIG_M5249 */
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#ifdef CONFIG_M532x
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__asm__ __volatile__ (
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"movel #0x81000200, %%d0\n\t"
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"movec %%d0, %%CACR\n\t"
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"nop\n\t"
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: : : "d0" );
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#endif /* CONFIG_M532x */
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}
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#endif /* _M68KNOMMU_CACHEFLUSH_H */
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