forked from luck/tmp_suning_uos_patched
8e8fff0975
Added ppc_sys device and system definitions for PowerQUICC II devices. This will allow drivers for PQ2 to be proper platform device drivers. Which can be shared on PQ3 processors with the same peripherals. Signed-off-by: Matt McClintock <msm@freescale.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
390 lines
7.0 KiB
C
390 lines
7.0 KiB
C
/*
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* arch/ppc/syslib/pq2_devices.c
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*
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* PQ2 Device descriptions
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*
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* Maintainer: Kumar Gala <kumar.gala@freescale.com>
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/ioport.h>
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#include <asm/cpm2.h>
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#include <asm/irq.h>
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#include <asm/ppc_sys.h>
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struct platform_device ppc_sys_platform_devices[] = {
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[MPC82xx_CPM_FCC1] = {
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.name = "fsl-cpm-fcc",
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.id = 1,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "fcc_regs",
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.start = 0x11300,
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.end = 0x1131f,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "fcc_pram",
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.start = 0x8400,
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.end = 0x84ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_FCC1,
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.end = SIU_INT_FCC1,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_FCC2] = {
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.name = "fsl-cpm-fcc",
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.id = 2,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "fcc_regs",
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.start = 0x11320,
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.end = 0x1133f,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "fcc_pram",
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.start = 0x8500,
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.end = 0x85ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_FCC2,
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.end = SIU_INT_FCC2,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_FCC3] = {
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.name = "fsl-cpm-fcc",
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.id = 3,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "fcc_regs",
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.start = 0x11340,
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.end = 0x1135f,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "fcc_pram",
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.start = 0x8600,
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.end = 0x86ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_FCC3,
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.end = SIU_INT_FCC3,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_I2C] = {
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.name = "fsl-cpm-i2c",
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.id = 1,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "i2c_mem",
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.start = 0x11860,
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.end = 0x118BF,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "i2c_pram",
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.start = 0x8afc,
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.end = 0x8afd,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_I2C,
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.end = SIU_INT_I2C,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_SCC1] = {
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.name = "fsl-cpm-scc",
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.id = 1,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "scc_mem",
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.start = 0x11A00,
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.end = 0x11A1F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "scc_pram",
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.start = 0x8000,
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.end = 0x80ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_SCC1,
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.end = SIU_INT_SCC1,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_SCC2] = {
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.name = "fsl-cpm-scc",
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.id = 2,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "scc_mem",
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.start = 0x11A20,
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.end = 0x11A3F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "scc_pram",
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.start = 0x8100,
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.end = 0x81ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_SCC2,
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.end = SIU_INT_SCC2,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_SCC3] = {
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.name = "fsl-cpm-scc",
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.id = 3,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "scc_mem",
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.start = 0x11A40,
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.end = 0x11A5F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "scc_pram",
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.start = 0x8200,
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.end = 0x82ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_SCC3,
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.end = SIU_INT_SCC3,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_SCC4] = {
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.name = "fsl-cpm-scc",
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.id = 4,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "scc_mem",
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.start = 0x11A60,
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.end = 0x11A7F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "scc_pram",
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.start = 0x8300,
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.end = 0x83ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_SCC4,
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.end = SIU_INT_SCC4,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_SPI] = {
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.name = "fsl-cpm-spi",
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.id = 1,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "spi_mem",
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.start = 0x11AA0,
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.end = 0x11AFF,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "spi_pram",
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.start = 0x89fc,
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.end = 0x89fd,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_SPI,
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.end = SIU_INT_SPI,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_MCC1] = {
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.name = "fsl-cpm-mcc",
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.id = 1,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "mcc_mem",
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.start = 0x11B30,
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.end = 0x11B3F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "mcc_pram",
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.start = 0x8700,
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.end = 0x877f,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_MCC1,
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.end = SIU_INT_MCC1,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_MCC2] = {
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.name = "fsl-cpm-mcc",
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.id = 2,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "mcc_mem",
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.start = 0x11B50,
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.end = 0x11B5F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "mcc_pram",
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.start = 0x8800,
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.end = 0x887f,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_MCC2,
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.end = SIU_INT_MCC2,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_SMC1] = {
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.name = "fsl-cpm-smc",
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.id = 1,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "smc_mem",
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.start = 0x11A80,
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.end = 0x11A8F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "smc_pram",
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.start = 0x87fc,
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.end = 0x87fd,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_SMC1,
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.end = SIU_INT_SMC1,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_SMC2] = {
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.name = "fsl-cpm-smc",
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.id = 2,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "smc_mem",
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.start = 0x11A90,
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.end = 0x11A9F,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "smc_pram",
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.start = 0x88fc,
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.end = 0x88fd,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_SMC2,
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.end = SIU_INT_SMC2,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_CPM_USB] = {
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.name = "fsl-cpm-usb",
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.id = 1,
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.num_resources = 3,
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.resource = (struct resource[]) {
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{
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.name = "usb_mem",
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.start = 0x11b60,
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.end = 0x11b78,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "usb_pram",
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.start = 0x8b00,
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.end = 0x8bff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = SIU_INT_USB,
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.end = SIU_INT_USB,
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.flags = IORESOURCE_IRQ,
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},
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},
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},
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[MPC82xx_SEC1] = {
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.name = "fsl-sec",
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.id = 1,
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.num_resources = 1,
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.resource = (struct resource[]) {
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{
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.name = "sec_mem",
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.start = 0x40000,
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.end = 0x52fff,
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.flags = IORESOURCE_MEM,
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},
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},
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},
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};
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static int __init mach_mpc82xx_fixup(struct platform_device *pdev)
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{
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ppc_sys_fixup_mem_resource(pdev, CPM_MAP_ADDR);
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return 0;
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}
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static int __init mach_mpc82xx_init(void)
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{
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if (ppc_md.progress)
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ppc_md.progress("mach_mpc82xx_init:enter", 0);
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ppc_sys_device_fixup = mach_mpc82xx_fixup;
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return 0;
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}
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postcore_initcall(mach_mpc82xx_init);
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