Thierry Reding 2a8102dfe0 memory: tegra: Create SMMU display groups ... Create SMMU display groups for Tegra30, Tegra114, Tegra124 and Tegra210. This allows the display controllers on these devices to share the same IOMMU domain using the standard IOMMU group mechanism. Signed-off-by: Thierry Reding <treding@nvidia.com>		2017-12-15 10:12:32 +01:00
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ahb.h
bpmp-abi.h	soc/tegra: bpmp: Update ABI header	2017-06-13 15:16:25 +02:00
bpmp.h	firmware: tegra: Add BPMP debugfs support	2017-10-19 16:27:56 +02:00
common.h
cpuidle.h	soc/tegra: Stub out PCIe IRQ workaround on 64-bit ARM	2016-06-30 13:54:17 +02:00
emc.h
flowctrl.h	soc/tegra: Move Tegra flowctrl driver	2017-04-04 15:48:04 +02:00
fuse.h	soc/tegra: Register SoC device	2017-08-17 16:43:13 +02:00
ivc.h	firmware: tegra: Add IVC library	2016-11-18 14:33:42 +01:00
mc.h	memory: tegra: Create SMMU display groups	2017-12-15 10:12:32 +01:00
pm.h
pmc.h	soc/tegra: Fix link errors with PMC disabled	2017-04-04 15:43:51 +02:00