Matthew Gerlach d201cc17a8 fpga pr ip: Core driver support for Altera Partial Reconfiguration IP. ... Adding the core functions necessary for a fpga-mgr driver for the Altera Partial IP component. It is intended for these functions to be used by the various bus implementations like the platform bus or the PCIe bus. Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Acked-by: Alan Tull <atull@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2017-04-08 17:45:28 +02:00
..
altera-pr-ip-core.h	fpga pr ip: Core driver support for Altera Partial Reconfiguration IP.	2017-04-08 17:45:28 +02:00
fpga-bridge.h	fpga: add fpga bridge framework	2016-11-10 17:03:35 +01:00
fpga-mgr.h	fpga: add config complete timeout	2017-04-08 17:45:28 +02:00