forked from luck/tmp_suning_uos_patched
9c9cf6bee8
Based on 1 normalized pattern(s): this driver is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 this driver is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this driver if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 6 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Armijn Hemel <armijn@tjaldur.nl> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190531190112.130218438@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
281 lines
7.3 KiB
C
281 lines
7.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* C-Media CMI8788 driver - helper functions
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*
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* Copyright (c) Clemens Ladisch <clemens@ladisch.de>
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*/
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#include <linux/delay.h>
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#include <linux/sched.h>
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#include <linux/export.h>
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#include <linux/io.h>
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#include <sound/core.h>
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#include <sound/mpu401.h>
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#include "oxygen.h"
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u8 oxygen_read8(struct oxygen *chip, unsigned int reg)
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{
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return inb(chip->addr + reg);
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}
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EXPORT_SYMBOL(oxygen_read8);
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u16 oxygen_read16(struct oxygen *chip, unsigned int reg)
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{
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return inw(chip->addr + reg);
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}
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EXPORT_SYMBOL(oxygen_read16);
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u32 oxygen_read32(struct oxygen *chip, unsigned int reg)
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{
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return inl(chip->addr + reg);
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}
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EXPORT_SYMBOL(oxygen_read32);
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void oxygen_write8(struct oxygen *chip, unsigned int reg, u8 value)
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{
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outb(value, chip->addr + reg);
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chip->saved_registers._8[reg] = value;
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}
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EXPORT_SYMBOL(oxygen_write8);
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void oxygen_write16(struct oxygen *chip, unsigned int reg, u16 value)
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{
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outw(value, chip->addr + reg);
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chip->saved_registers._16[reg / 2] = cpu_to_le16(value);
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}
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EXPORT_SYMBOL(oxygen_write16);
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void oxygen_write32(struct oxygen *chip, unsigned int reg, u32 value)
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{
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outl(value, chip->addr + reg);
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chip->saved_registers._32[reg / 4] = cpu_to_le32(value);
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}
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EXPORT_SYMBOL(oxygen_write32);
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void oxygen_write8_masked(struct oxygen *chip, unsigned int reg,
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u8 value, u8 mask)
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{
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u8 tmp = inb(chip->addr + reg);
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tmp &= ~mask;
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tmp |= value & mask;
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outb(tmp, chip->addr + reg);
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chip->saved_registers._8[reg] = tmp;
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}
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EXPORT_SYMBOL(oxygen_write8_masked);
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void oxygen_write16_masked(struct oxygen *chip, unsigned int reg,
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u16 value, u16 mask)
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{
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u16 tmp = inw(chip->addr + reg);
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tmp &= ~mask;
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tmp |= value & mask;
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outw(tmp, chip->addr + reg);
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chip->saved_registers._16[reg / 2] = cpu_to_le16(tmp);
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}
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EXPORT_SYMBOL(oxygen_write16_masked);
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void oxygen_write32_masked(struct oxygen *chip, unsigned int reg,
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u32 value, u32 mask)
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{
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u32 tmp = inl(chip->addr + reg);
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tmp &= ~mask;
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tmp |= value & mask;
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outl(tmp, chip->addr + reg);
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chip->saved_registers._32[reg / 4] = cpu_to_le32(tmp);
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}
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EXPORT_SYMBOL(oxygen_write32_masked);
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static int oxygen_ac97_wait(struct oxygen *chip, unsigned int mask)
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{
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u8 status = 0;
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/*
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* Reading the status register also clears the bits, so we have to save
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* the read bits in status.
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*/
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wait_event_timeout(chip->ac97_waitqueue,
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({ status |= oxygen_read8(chip, OXYGEN_AC97_INTERRUPT_STATUS);
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status & mask; }),
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msecs_to_jiffies(1) + 1);
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/*
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* Check even after a timeout because this function should not require
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* the AC'97 interrupt to be enabled.
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*/
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status |= oxygen_read8(chip, OXYGEN_AC97_INTERRUPT_STATUS);
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return status & mask ? 0 : -EIO;
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}
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/*
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* About 10% of AC'97 register reads or writes fail to complete, but even those
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* where the controller indicates completion aren't guaranteed to have actually
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* happened.
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*
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* It's hard to assign blame to either the controller or the codec because both
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* were made by C-Media ...
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*/
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void oxygen_write_ac97(struct oxygen *chip, unsigned int codec,
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unsigned int index, u16 data)
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{
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unsigned int count, succeeded;
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u32 reg;
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reg = data;
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reg |= index << OXYGEN_AC97_REG_ADDR_SHIFT;
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reg |= OXYGEN_AC97_REG_DIR_WRITE;
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reg |= codec << OXYGEN_AC97_REG_CODEC_SHIFT;
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succeeded = 0;
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for (count = 5; count > 0; --count) {
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udelay(5);
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oxygen_write32(chip, OXYGEN_AC97_REGS, reg);
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/* require two "completed" writes, just to be sure */
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if (oxygen_ac97_wait(chip, OXYGEN_AC97_INT_WRITE_DONE) >= 0 &&
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++succeeded >= 2) {
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chip->saved_ac97_registers[codec][index / 2] = data;
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return;
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}
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}
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dev_err(chip->card->dev, "AC'97 write timeout\n");
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}
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EXPORT_SYMBOL(oxygen_write_ac97);
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u16 oxygen_read_ac97(struct oxygen *chip, unsigned int codec,
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unsigned int index)
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{
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unsigned int count;
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unsigned int last_read = UINT_MAX;
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u32 reg;
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reg = index << OXYGEN_AC97_REG_ADDR_SHIFT;
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reg |= OXYGEN_AC97_REG_DIR_READ;
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reg |= codec << OXYGEN_AC97_REG_CODEC_SHIFT;
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for (count = 5; count > 0; --count) {
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udelay(5);
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oxygen_write32(chip, OXYGEN_AC97_REGS, reg);
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udelay(10);
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if (oxygen_ac97_wait(chip, OXYGEN_AC97_INT_READ_DONE) >= 0) {
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u16 value = oxygen_read16(chip, OXYGEN_AC97_REGS);
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/* we require two consecutive reads of the same value */
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if (value == last_read)
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return value;
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last_read = value;
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/*
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* Invert the register value bits to make sure that two
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* consecutive unsuccessful reads do not return the same
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* value.
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*/
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reg ^= 0xffff;
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}
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}
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dev_err(chip->card->dev, "AC'97 read timeout on codec %u\n", codec);
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return 0;
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}
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EXPORT_SYMBOL(oxygen_read_ac97);
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void oxygen_write_ac97_masked(struct oxygen *chip, unsigned int codec,
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unsigned int index, u16 data, u16 mask)
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{
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u16 value = oxygen_read_ac97(chip, codec, index);
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value &= ~mask;
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value |= data & mask;
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oxygen_write_ac97(chip, codec, index, value);
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}
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EXPORT_SYMBOL(oxygen_write_ac97_masked);
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static int oxygen_wait_spi(struct oxygen *chip)
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{
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unsigned int count;
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/*
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* Higher timeout to be sure: 200 us;
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* actual transaction should not need more than 40 us.
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*/
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for (count = 50; count > 0; count--) {
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udelay(4);
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if ((oxygen_read8(chip, OXYGEN_SPI_CONTROL) &
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OXYGEN_SPI_BUSY) == 0)
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return 0;
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}
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dev_err(chip->card->dev, "oxygen: SPI wait timeout\n");
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return -EIO;
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}
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int oxygen_write_spi(struct oxygen *chip, u8 control, unsigned int data)
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{
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/*
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* We need to wait AFTER initiating the SPI transaction,
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* otherwise read operations will not work.
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*/
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oxygen_write8(chip, OXYGEN_SPI_DATA1, data);
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oxygen_write8(chip, OXYGEN_SPI_DATA2, data >> 8);
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if (control & OXYGEN_SPI_DATA_LENGTH_3)
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oxygen_write8(chip, OXYGEN_SPI_DATA3, data >> 16);
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oxygen_write8(chip, OXYGEN_SPI_CONTROL, control);
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return oxygen_wait_spi(chip);
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}
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EXPORT_SYMBOL(oxygen_write_spi);
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void oxygen_write_i2c(struct oxygen *chip, u8 device, u8 map, u8 data)
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{
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/* should not need more than about 300 us */
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msleep(1);
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oxygen_write8(chip, OXYGEN_2WIRE_MAP, map);
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oxygen_write8(chip, OXYGEN_2WIRE_DATA, data);
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oxygen_write8(chip, OXYGEN_2WIRE_CONTROL,
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device | OXYGEN_2WIRE_DIR_WRITE);
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}
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EXPORT_SYMBOL(oxygen_write_i2c);
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static void _write_uart(struct oxygen *chip, unsigned int port, u8 data)
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{
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if (oxygen_read8(chip, OXYGEN_MPU401 + 1) & MPU401_TX_FULL)
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msleep(1);
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oxygen_write8(chip, OXYGEN_MPU401 + port, data);
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}
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void oxygen_reset_uart(struct oxygen *chip)
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{
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_write_uart(chip, 1, MPU401_RESET);
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msleep(1); /* wait for ACK */
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_write_uart(chip, 1, MPU401_ENTER_UART);
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}
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EXPORT_SYMBOL(oxygen_reset_uart);
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void oxygen_write_uart(struct oxygen *chip, u8 data)
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{
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_write_uart(chip, 0, data);
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}
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EXPORT_SYMBOL(oxygen_write_uart);
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u16 oxygen_read_eeprom(struct oxygen *chip, unsigned int index)
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{
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unsigned int timeout;
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oxygen_write8(chip, OXYGEN_EEPROM_CONTROL,
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index | OXYGEN_EEPROM_DIR_READ);
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for (timeout = 0; timeout < 100; ++timeout) {
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udelay(1);
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if (!(oxygen_read8(chip, OXYGEN_EEPROM_STATUS)
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& OXYGEN_EEPROM_BUSY))
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break;
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}
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return oxygen_read16(chip, OXYGEN_EEPROM_DATA);
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}
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void oxygen_write_eeprom(struct oxygen *chip, unsigned int index, u16 value)
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{
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unsigned int timeout;
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oxygen_write16(chip, OXYGEN_EEPROM_DATA, value);
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oxygen_write8(chip, OXYGEN_EEPROM_CONTROL,
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index | OXYGEN_EEPROM_DIR_WRITE);
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for (timeout = 0; timeout < 10; ++timeout) {
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msleep(1);
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if (!(oxygen_read8(chip, OXYGEN_EEPROM_STATUS)
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& OXYGEN_EEPROM_BUSY))
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return;
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}
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dev_err(chip->card->dev, "EEPROM write timeout\n");
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}
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