forked from luck/tmp_suning_uos_patched
6bb27d7349
Now that the only field in struct sys_timer is .init, delete the struct, and replace the machine descriptor .timer field with the initialization function itself. This will enable moving timer drivers into drivers/clocksource without having to place a public prototype of each struct sys_timer object into include/linux; the intent is to create a single of_clocksource_init() function that determines which timer driver to initialize by scanning the device dtree, much like the proposed irqchip_init() at: http://www.spinics.net/lists/arm-kernel/msg203686.html Includes mach-omap2 fixes from Igor Grinberg. Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Stephen Warren <swarren@nvidia.com>
91 lines
2.0 KiB
C
91 lines
2.0 KiB
C
/*
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* linux/arch/arm/common/time-acorn.c
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*
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* Copyright (c) 1996-2000 Russell King.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Changelog:
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* 24-Sep-1996 RMK Created
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* 10-Oct-1996 RMK Brought up to date with arch-sa110eval
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* 04-Dec-1997 RMK Updated for new arch/arm/time.c
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* 13=Jun-2004 DS Moved to arch/arm/common b/c shared w/CLPS7500
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*/
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#include <linux/timex.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <asm/hardware/ioc.h>
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#include <asm/mach/time.h>
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static u32 ioc_timer_gettimeoffset(void)
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{
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unsigned int count1, count2, status;
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long offset;
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ioc_writeb (0, IOC_T0LATCH);
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barrier ();
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count1 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8);
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barrier ();
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status = ioc_readb(IOC_IRQREQA);
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barrier ();
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ioc_writeb (0, IOC_T0LATCH);
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barrier ();
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count2 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8);
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offset = count2;
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if (count2 < count1) {
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/*
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* We have not had an interrupt between reading count1
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* and count2.
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*/
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if (status & (1 << 5))
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offset -= LATCH;
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} else if (count2 > count1) {
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/*
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* We have just had another interrupt between reading
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* count1 and count2.
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*/
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offset -= LATCH;
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}
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offset = (LATCH - offset) * (tick_nsec / 1000);
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return ((offset + LATCH/2) / LATCH) * 1000;
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}
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void __init ioctime_init(void)
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{
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ioc_writeb(LATCH & 255, IOC_T0LTCHL);
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ioc_writeb(LATCH >> 8, IOC_T0LTCHH);
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ioc_writeb(0, IOC_T0GO);
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}
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static irqreturn_t
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ioc_timer_interrupt(int irq, void *dev_id)
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{
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timer_tick();
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return IRQ_HANDLED;
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}
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static struct irqaction ioc_timer_irq = {
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.name = "timer",
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.flags = IRQF_DISABLED,
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.handler = ioc_timer_interrupt
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};
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/*
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* Set up timer interrupt.
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*/
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void __init ioc_timer_init(void)
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{
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arch_gettimeoffset = ioc_timer_gettimeoffset;
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ioctime_init();
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setup_irq(IRQ_TIMER0, &ioc_timer_irq);
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}
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