forked from luck/tmp_suning_uos_patched
187335a4ec
This patch adds detection of the Altivec capability of the CPU via the firmware in addition to the cpu table. This allows newer CPUs that aren't in the table to still have working altivec support in the kernel. It also fixes a problem where if a CPU isn't recognized as having altivec features, and takes an altivec unavailable exception due to userland issuing altivec instructions, the kernel would happily enable it and context switch the registers ... but not all of them (it would basically forget vrsave). With this patch, the kernel will refuse to enable altivec when the feature isn't detected for the CPU (SIGILL). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
564 lines
13 KiB
C
564 lines
13 KiB
C
/*
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* linux/arch/ppc64/kernel/traps.c
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*
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* Modified by Cort Dougan (cort@cs.nmt.edu)
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* and Paul Mackerras (paulus@cs.anu.edu.au)
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*/
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/*
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* This file handles the architecture-dependent parts of hardware exceptions
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*/
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#include <linux/config.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/stddef.h>
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#include <linux/unistd.h>
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#include <linux/slab.h>
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#include <linux/user.h>
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#include <linux/a.out.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <asm/kdebug.h>
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#include <asm/pgtable.h>
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#include <asm/uaccess.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <asm/ppcdebug.h>
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#include <asm/rtas.h>
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#include <asm/systemcfg.h>
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#include <asm/machdep.h>
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#include <asm/pmc.h>
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#ifdef CONFIG_DEBUGGER
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int (*__debugger)(struct pt_regs *regs);
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int (*__debugger_ipi)(struct pt_regs *regs);
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int (*__debugger_bpt)(struct pt_regs *regs);
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int (*__debugger_sstep)(struct pt_regs *regs);
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int (*__debugger_iabr_match)(struct pt_regs *regs);
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int (*__debugger_dabr_match)(struct pt_regs *regs);
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int (*__debugger_fault_handler)(struct pt_regs *regs);
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EXPORT_SYMBOL(__debugger);
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EXPORT_SYMBOL(__debugger_ipi);
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EXPORT_SYMBOL(__debugger_bpt);
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EXPORT_SYMBOL(__debugger_sstep);
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EXPORT_SYMBOL(__debugger_iabr_match);
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EXPORT_SYMBOL(__debugger_dabr_match);
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EXPORT_SYMBOL(__debugger_fault_handler);
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#endif
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struct notifier_block *ppc64_die_chain;
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static DEFINE_SPINLOCK(die_notifier_lock);
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int register_die_notifier(struct notifier_block *nb)
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{
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int err = 0;
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unsigned long flags;
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spin_lock_irqsave(&die_notifier_lock, flags);
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err = notifier_chain_register(&ppc64_die_chain, nb);
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spin_unlock_irqrestore(&die_notifier_lock, flags);
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return err;
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}
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/*
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* Trap & Exception support
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*/
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static DEFINE_SPINLOCK(die_lock);
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int die(const char *str, struct pt_regs *regs, long err)
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{
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static int die_counter;
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int nl = 0;
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if (debugger(regs))
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return 1;
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console_verbose();
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spin_lock_irq(&die_lock);
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bust_spinlocks(1);
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printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
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#ifdef CONFIG_PREEMPT
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printk("PREEMPT ");
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nl = 1;
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#endif
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#ifdef CONFIG_SMP
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printk("SMP NR_CPUS=%d ", NR_CPUS);
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nl = 1;
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#endif
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#ifdef CONFIG_DEBUG_PAGEALLOC
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printk("DEBUG_PAGEALLOC ");
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nl = 1;
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#endif
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#ifdef CONFIG_NUMA
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printk("NUMA ");
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nl = 1;
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#endif
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switch(systemcfg->platform) {
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case PLATFORM_PSERIES:
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printk("PSERIES ");
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nl = 1;
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break;
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case PLATFORM_PSERIES_LPAR:
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printk("PSERIES LPAR ");
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nl = 1;
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break;
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case PLATFORM_ISERIES_LPAR:
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printk("ISERIES LPAR ");
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nl = 1;
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break;
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case PLATFORM_POWERMAC:
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printk("POWERMAC ");
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nl = 1;
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break;
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}
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if (nl)
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printk("\n");
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print_modules();
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show_regs(regs);
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bust_spinlocks(0);
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spin_unlock_irq(&die_lock);
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if (in_interrupt())
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panic("Fatal exception in interrupt");
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if (panic_on_oops) {
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printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
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ssleep(5);
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panic("Fatal exception");
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}
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do_exit(SIGSEGV);
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return 0;
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}
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void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
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{
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siginfo_t info;
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if (!user_mode(regs)) {
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if (die("Exception in kernel mode", regs, signr))
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return;
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}
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memset(&info, 0, sizeof(info));
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info.si_signo = signr;
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info.si_code = code;
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info.si_addr = (void __user *) addr;
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force_sig_info(signr, &info, current);
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}
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void system_reset_exception(struct pt_regs *regs)
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{
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/* See if any machine dependent calls */
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if (ppc_md.system_reset_exception)
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ppc_md.system_reset_exception(regs);
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die("System Reset", regs, 0);
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/* Must die if the interrupt is not recoverable */
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if (!(regs->msr & MSR_RI))
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panic("Unrecoverable System Reset");
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/* What should we do here? We could issue a shutdown or hard reset. */
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}
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void machine_check_exception(struct pt_regs *regs)
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{
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int recover = 0;
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/* See if any machine dependent calls */
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if (ppc_md.machine_check_exception)
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recover = ppc_md.machine_check_exception(regs);
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if (recover)
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return;
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if (debugger_fault_handler(regs))
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return;
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die("Machine check", regs, 0);
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/* Must die if the interrupt is not recoverable */
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if (!(regs->msr & MSR_RI))
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panic("Unrecoverable Machine check");
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}
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void unknown_exception(struct pt_regs *regs)
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{
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printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
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regs->nip, regs->msr, regs->trap);
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_exception(SIGTRAP, regs, 0, 0);
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}
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void instruction_breakpoint_exception(struct pt_regs *regs)
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{
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if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5,
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5, SIGTRAP) == NOTIFY_STOP)
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return;
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if (debugger_iabr_match(regs))
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return;
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_exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
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}
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void single_step_exception(struct pt_regs *regs)
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{
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regs->msr &= ~MSR_SE; /* Turn off 'trace' bit */
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if (notify_die(DIE_SSTEP, "single_step", regs, 5,
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5, SIGTRAP) == NOTIFY_STOP)
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return;
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if (debugger_sstep(regs))
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return;
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_exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
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}
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/*
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* After we have successfully emulated an instruction, we have to
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* check if the instruction was being single-stepped, and if so,
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* pretend we got a single-step exception. This was pointed out
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* by Kumar Gala. -- paulus
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*/
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static inline void emulate_single_step(struct pt_regs *regs)
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{
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if (regs->msr & MSR_SE)
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single_step_exception(regs);
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}
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static void parse_fpe(struct pt_regs *regs)
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{
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int code = 0;
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unsigned long fpscr;
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flush_fp_to_thread(current);
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fpscr = current->thread.fpscr;
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/* Invalid operation */
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if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX))
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code = FPE_FLTINV;
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/* Overflow */
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else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX))
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code = FPE_FLTOVF;
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/* Underflow */
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else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX))
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code = FPE_FLTUND;
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/* Divide by zero */
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else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX))
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code = FPE_FLTDIV;
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/* Inexact result */
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else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX))
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code = FPE_FLTRES;
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_exception(SIGFPE, regs, code, regs->nip);
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}
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/*
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* Illegal instruction emulation support. Return non-zero if we can't
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* emulate, or -EFAULT if the associated memory access caused an access
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* fault. Return zero on success.
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*/
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#define INST_MFSPR_PVR 0x7c1f42a6
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#define INST_MFSPR_PVR_MASK 0xfc1fffff
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#define INST_DCBA 0x7c0005ec
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#define INST_DCBA_MASK 0x7c0007fe
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#define INST_MCRXR 0x7c000400
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#define INST_MCRXR_MASK 0x7c0007fe
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static int emulate_instruction(struct pt_regs *regs)
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{
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unsigned int instword;
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if (!user_mode(regs))
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return -EINVAL;
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CHECK_FULL_REGS(regs);
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if (get_user(instword, (unsigned int __user *)(regs->nip)))
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return -EFAULT;
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/* Emulate the mfspr rD, PVR. */
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if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) {
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unsigned int rd;
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rd = (instword >> 21) & 0x1f;
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regs->gpr[rd] = mfspr(SPRN_PVR);
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return 0;
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}
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/* Emulating the dcba insn is just a no-op. */
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if ((instword & INST_DCBA_MASK) == INST_DCBA) {
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static int warned;
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if (!warned) {
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printk(KERN_WARNING
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"process %d (%s) uses obsolete 'dcba' insn\n",
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current->pid, current->comm);
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warned = 1;
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}
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return 0;
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}
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/* Emulate the mcrxr insn. */
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if ((instword & INST_MCRXR_MASK) == INST_MCRXR) {
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static int warned;
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unsigned int shift;
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if (!warned) {
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printk(KERN_WARNING
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"process %d (%s) uses obsolete 'mcrxr' insn\n",
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current->pid, current->comm);
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warned = 1;
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}
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shift = (instword >> 21) & 0x1c;
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regs->ccr &= ~(0xf0000000 >> shift);
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regs->ccr |= (regs->xer & 0xf0000000) >> shift;
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regs->xer &= ~0xf0000000;
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return 0;
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}
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return -EINVAL;
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}
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/*
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* Look through the list of trap instructions that are used for BUG(),
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* BUG_ON() and WARN_ON() and see if we hit one. At this point we know
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* that the exception was caused by a trap instruction of some kind.
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* Returns 1 if we should continue (i.e. it was a WARN_ON) or 0
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* otherwise.
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*/
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extern struct bug_entry __start___bug_table[], __stop___bug_table[];
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#ifndef CONFIG_MODULES
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#define module_find_bug(x) NULL
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#endif
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struct bug_entry *find_bug(unsigned long bugaddr)
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{
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struct bug_entry *bug;
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for (bug = __start___bug_table; bug < __stop___bug_table; ++bug)
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if (bugaddr == bug->bug_addr)
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return bug;
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return module_find_bug(bugaddr);
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}
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static int
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check_bug_trap(struct pt_regs *regs)
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{
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struct bug_entry *bug;
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unsigned long addr;
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if (regs->msr & MSR_PR)
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return 0; /* not in kernel */
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addr = regs->nip; /* address of trap instruction */
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if (addr < PAGE_OFFSET)
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return 0;
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bug = find_bug(regs->nip);
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if (bug == NULL)
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return 0;
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if (bug->line & BUG_WARNING_TRAP) {
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/* this is a WARN_ON rather than BUG/BUG_ON */
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printk(KERN_ERR "Badness in %s at %s:%d\n",
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bug->function, bug->file,
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(unsigned int)bug->line & ~BUG_WARNING_TRAP);
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show_stack(current, (void *)regs->gpr[1]);
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return 1;
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}
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printk(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
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bug->function, bug->file, (unsigned int)bug->line);
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return 0;
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}
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void program_check_exception(struct pt_regs *regs)
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{
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if (debugger_fault_handler(regs))
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return;
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if (regs->msr & 0x100000) {
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/* IEEE FP exception */
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parse_fpe(regs);
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} else if (regs->msr & 0x20000) {
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/* trap exception */
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if (notify_die(DIE_BPT, "breakpoint", regs, 5,
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5, SIGTRAP) == NOTIFY_STOP)
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return;
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if (debugger_bpt(regs))
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return;
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if (check_bug_trap(regs)) {
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regs->nip += 4;
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return;
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}
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_exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
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} else {
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/* Privileged or illegal instruction; try to emulate it. */
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switch (emulate_instruction(regs)) {
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case 0:
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regs->nip += 4;
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emulate_single_step(regs);
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break;
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case -EFAULT:
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_exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
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break;
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default:
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if (regs->msr & 0x40000)
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/* priveleged */
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_exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
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else
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/* illegal */
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_exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
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break;
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}
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}
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}
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void kernel_fp_unavailable_exception(struct pt_regs *regs)
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{
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printk(KERN_EMERG "Unrecoverable FP Unavailable Exception "
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"%lx at %lx\n", regs->trap, regs->nip);
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die("Unrecoverable FP Unavailable Exception", regs, SIGABRT);
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}
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void altivec_unavailable_exception(struct pt_regs *regs)
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{
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if (user_mode(regs)) {
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/* A user program has executed an altivec instruction,
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but this kernel doesn't support altivec. */
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_exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
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return;
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}
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printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception "
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"%lx at %lx\n", regs->trap, regs->nip);
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die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT);
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}
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extern perf_irq_t perf_irq;
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void performance_monitor_exception(struct pt_regs *regs)
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{
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perf_irq(regs);
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}
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void alignment_exception(struct pt_regs *regs)
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{
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int fixed;
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fixed = fix_alignment(regs);
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if (fixed == 1) {
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regs->nip += 4; /* skip over emulated instruction */
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emulate_single_step(regs);
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return;
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}
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/* Operand address was bad */
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if (fixed == -EFAULT) {
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if (user_mode(regs)) {
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_exception(SIGSEGV, regs, SEGV_MAPERR, regs->dar);
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} else {
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/* Search exception table */
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bad_page_fault(regs, regs->dar, SIGSEGV);
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}
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return;
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}
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_exception(SIGBUS, regs, BUS_ADRALN, regs->nip);
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}
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#ifdef CONFIG_ALTIVEC
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void altivec_assist_exception(struct pt_regs *regs)
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{
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int err;
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siginfo_t info;
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if (!user_mode(regs)) {
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printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode"
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" at %lx\n", regs->nip);
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die("Kernel VMX/Altivec assist exception", regs, SIGILL);
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}
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flush_altivec_to_thread(current);
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err = emulate_altivec(regs);
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if (err == 0) {
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regs->nip += 4; /* skip emulated instruction */
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emulate_single_step(regs);
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return;
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}
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if (err == -EFAULT) {
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/* got an error reading the instruction */
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info.si_signo = SIGSEGV;
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info.si_errno = 0;
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info.si_code = SEGV_MAPERR;
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info.si_addr = (void __user *) regs->nip;
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force_sig_info(SIGSEGV, &info, current);
|
|
} else {
|
|
/* didn't recognize the instruction */
|
|
/* XXX quick hack for now: set the non-Java bit in the VSCR */
|
|
if (printk_ratelimit())
|
|
printk(KERN_ERR "Unrecognized altivec instruction "
|
|
"in %s at %lx\n", current->comm, regs->nip);
|
|
current->thread.vscr.u[3] |= 0x10000;
|
|
}
|
|
}
|
|
#endif /* CONFIG_ALTIVEC */
|
|
|
|
/*
|
|
* We enter here if we get an unrecoverable exception, that is, one
|
|
* that happened at a point where the RI (recoverable interrupt) bit
|
|
* in the MSR is 0. This indicates that SRR0/1 are live, and that
|
|
* we therefore lost state by taking this exception.
|
|
*/
|
|
void unrecoverable_exception(struct pt_regs *regs)
|
|
{
|
|
printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n",
|
|
regs->trap, regs->nip);
|
|
die("Unrecoverable exception", regs, SIGABRT);
|
|
}
|
|
|
|
/*
|
|
* We enter here if we discover during exception entry that we are
|
|
* running in supervisor mode with a userspace value in the stack pointer.
|
|
*/
|
|
void kernel_bad_stack(struct pt_regs *regs)
|
|
{
|
|
printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n",
|
|
regs->gpr[1], regs->nip);
|
|
die("Bad kernel stack pointer", regs, SIGABRT);
|
|
}
|
|
|
|
void __init trap_init(void)
|
|
{
|
|
}
|