forked from luck/tmp_suning_uos_patched
1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
361 lines
7.8 KiB
C
361 lines
7.8 KiB
C
/*
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* NS16550 Serial Port (uart) debugging stuff.
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*
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* c 2001 PPC 64 Team, IBM Corp
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <stdarg.h>
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#define WANT_PPCDBG_TAB /* Only defined here */
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#include <linux/config.h>
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#include <linux/types.h>
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#include <asm/ppcdebug.h>
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#include <asm/processor.h>
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#include <asm/uaccess.h>
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#include <asm/machdep.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/pmac_feature.h>
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extern u8 real_readb(volatile u8 __iomem *addr);
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extern void real_writeb(u8 data, volatile u8 __iomem *addr);
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struct NS16550 {
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/* this struct must be packed */
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unsigned char rbr; /* 0 */
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unsigned char ier; /* 1 */
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unsigned char fcr; /* 2 */
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unsigned char lcr; /* 3 */
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unsigned char mcr; /* 4 */
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unsigned char lsr; /* 5 */
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unsigned char msr; /* 6 */
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unsigned char scr; /* 7 */
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};
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#define thr rbr
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#define iir fcr
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#define dll rbr
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#define dlm ier
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#define dlab lcr
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#define LSR_DR 0x01 /* Data ready */
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#define LSR_OE 0x02 /* Overrun */
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#define LSR_PE 0x04 /* Parity error */
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#define LSR_FE 0x08 /* Framing error */
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#define LSR_BI 0x10 /* Break */
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#define LSR_THRE 0x20 /* Xmit holding register empty */
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#define LSR_TEMT 0x40 /* Xmitter empty */
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#define LSR_ERR 0x80 /* Error */
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static volatile struct NS16550 __iomem *udbg_comport;
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void udbg_init_uart(void __iomem *comport, unsigned int speed)
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{
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u16 dll = speed ? (115200 / speed) : 12;
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if (comport) {
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udbg_comport = (struct NS16550 __iomem *)comport;
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out_8(&udbg_comport->lcr, 0x00);
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out_8(&udbg_comport->ier, 0xff);
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out_8(&udbg_comport->ier, 0x00);
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out_8(&udbg_comport->lcr, 0x80); /* Access baud rate */
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out_8(&udbg_comport->dll, dll & 0xff); /* 1 = 115200, 2 = 57600,
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3 = 38400, 12 = 9600 baud */
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out_8(&udbg_comport->dlm, dll >> 8); /* dll >> 8 which should be zero
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for fast rates; */
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out_8(&udbg_comport->lcr, 0x03); /* 8 data, 1 stop, no parity */
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out_8(&udbg_comport->mcr, 0x03); /* RTS/DTR */
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out_8(&udbg_comport->fcr ,0x07); /* Clear & enable FIFOs */
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}
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}
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#ifdef CONFIG_PPC_PMAC
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#define SCC_TXRDY 4
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#define SCC_RXRDY 1
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static volatile u8 __iomem *sccc;
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static volatile u8 __iomem *sccd;
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static unsigned char scc_inittab[] = {
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13, 0, /* set baud rate divisor */
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12, 0,
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14, 1, /* baud rate gen enable, src=rtxc */
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11, 0x50, /* clocks = br gen */
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5, 0xea, /* tx 8 bits, assert DTR & RTS */
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4, 0x46, /* x16 clock, 1 stop */
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3, 0xc1, /* rx enable, 8 bits */
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};
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void udbg_init_scc(struct device_node *np)
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{
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u32 *reg;
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unsigned long addr;
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int i, x;
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if (np == NULL)
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np = of_find_node_by_name(NULL, "escc");
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if (np == NULL || np->parent == NULL)
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return;
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udbg_printf("found SCC...\n");
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/* Get address within mac-io ASIC */
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reg = (u32 *)get_property(np, "reg", NULL);
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if (reg == NULL)
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return;
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addr = reg[0];
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udbg_printf("local addr: %lx\n", addr);
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/* Get address of mac-io PCI itself */
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reg = (u32 *)get_property(np->parent, "assigned-addresses", NULL);
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if (reg == NULL)
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return;
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addr += reg[2];
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udbg_printf("final addr: %lx\n", addr);
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/* Setup for 57600 8N1 */
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addr += 0x20;
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sccc = (volatile u8 * __iomem) ioremap(addr & PAGE_MASK, PAGE_SIZE) ;
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sccc += addr & ~PAGE_MASK;
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sccd = sccc + 0x10;
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udbg_printf("ioremap result sccc: %p\n", sccc);
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mb();
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for (i = 20000; i != 0; --i)
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x = in_8(sccc);
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out_8(sccc, 0x09); /* reset A or B side */
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out_8(sccc, 0xc0);
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for (i = 0; i < sizeof(scc_inittab); ++i)
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out_8(sccc, scc_inittab[i]);
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ppc_md.udbg_putc = udbg_putc;
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ppc_md.udbg_getc = udbg_getc;
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ppc_md.udbg_getc_poll = udbg_getc_poll;
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udbg_puts("Hello World !\n");
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}
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#endif /* CONFIG_PPC_PMAC */
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#if CONFIG_PPC_PMAC
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static void udbg_real_putc(unsigned char c)
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{
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while ((real_readb(sccc) & SCC_TXRDY) == 0)
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;
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real_writeb(c, sccd);
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if (c == '\n')
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udbg_real_putc('\r');
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}
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void udbg_init_pmac_realmode(void)
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{
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sccc = (volatile u8 __iomem *)0x80013020ul;
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sccd = (volatile u8 __iomem *)0x80013030ul;
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ppc_md.udbg_putc = udbg_real_putc;
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ppc_md.udbg_getc = NULL;
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ppc_md.udbg_getc_poll = NULL;
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}
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#endif /* CONFIG_PPC_PMAC */
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#ifdef CONFIG_PPC_MAPLE
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void udbg_maple_real_putc(unsigned char c)
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{
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if (udbg_comport) {
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while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
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/* wait for idle */;
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real_writeb(c, &udbg_comport->thr); eieio();
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if (c == '\n') {
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/* Also put a CR. This is for convenience. */
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while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
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/* wait for idle */;
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real_writeb('\r', &udbg_comport->thr); eieio();
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}
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}
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}
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void udbg_init_maple_realmode(void)
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{
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udbg_comport = (volatile struct NS16550 __iomem *)0xf40003f8;
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ppc_md.udbg_putc = udbg_maple_real_putc;
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ppc_md.udbg_getc = NULL;
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ppc_md.udbg_getc_poll = NULL;
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}
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#endif /* CONFIG_PPC_MAPLE */
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void udbg_putc(unsigned char c)
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{
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if (udbg_comport) {
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while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
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/* wait for idle */;
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out_8(&udbg_comport->thr, c);
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if (c == '\n') {
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/* Also put a CR. This is for convenience. */
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while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
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/* wait for idle */;
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out_8(&udbg_comport->thr, '\r');
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}
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}
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#ifdef CONFIG_PPC_PMAC
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else if (sccc) {
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while ((in_8(sccc) & SCC_TXRDY) == 0)
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;
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out_8(sccd, c);
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if (c == '\n')
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udbg_putc('\r');
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}
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#endif /* CONFIG_PPC_PMAC */
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}
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int udbg_getc_poll(void)
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{
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if (udbg_comport) {
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if ((in_8(&udbg_comport->lsr) & LSR_DR) != 0)
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return in_8(&udbg_comport->rbr);
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else
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return -1;
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}
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#ifdef CONFIG_PPC_PMAC
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else if (sccc) {
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if ((in_8(sccc) & SCC_RXRDY) != 0)
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return in_8(sccd);
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else
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return -1;
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}
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#endif /* CONFIG_PPC_PMAC */
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return -1;
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}
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unsigned char udbg_getc(void)
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{
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if (udbg_comport) {
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while ((in_8(&udbg_comport->lsr) & LSR_DR) == 0)
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/* wait for char */;
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return in_8(&udbg_comport->rbr);
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}
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#ifdef CONFIG_PPC_PMAC
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else if (sccc) {
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while ((in_8(sccc) & SCC_RXRDY) == 0)
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;
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return in_8(sccd);
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}
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#endif /* CONFIG_PPC_PMAC */
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return 0;
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}
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void udbg_puts(const char *s)
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{
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if (ppc_md.udbg_putc) {
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char c;
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if (s && *s != '\0') {
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while ((c = *s++) != '\0')
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ppc_md.udbg_putc(c);
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}
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}
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#if 0
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else {
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printk("%s", s);
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}
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#endif
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}
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int udbg_write(const char *s, int n)
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{
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int remain = n;
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char c;
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if (!ppc_md.udbg_putc)
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return 0;
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if (s && *s != '\0') {
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while (((c = *s++) != '\0') && (remain-- > 0)) {
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ppc_md.udbg_putc(c);
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}
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}
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return n - remain;
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}
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int udbg_read(char *buf, int buflen)
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{
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char c, *p = buf;
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int i;
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if (!ppc_md.udbg_getc)
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return 0;
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for (i = 0; i < buflen; ++i) {
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do {
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c = ppc_md.udbg_getc();
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} while (c == 0x11 || c == 0x13);
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if (c == 0)
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break;
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*p++ = c;
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}
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return i;
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}
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void udbg_console_write(struct console *con, const char *s, unsigned int n)
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{
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udbg_write(s, n);
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}
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#define UDBG_BUFSIZE 256
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void udbg_printf(const char *fmt, ...)
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{
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unsigned char buf[UDBG_BUFSIZE];
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va_list args;
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va_start(args, fmt);
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vsnprintf(buf, UDBG_BUFSIZE, fmt, args);
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udbg_puts(buf);
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va_end(args);
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}
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/* Special print used by PPCDBG() macro */
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void udbg_ppcdbg(unsigned long debug_flags, const char *fmt, ...)
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{
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unsigned long active_debugs = debug_flags & ppc64_debug_switch;
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if (active_debugs) {
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va_list ap;
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unsigned char buf[UDBG_BUFSIZE];
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unsigned long i, len = 0;
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for (i=0; i < PPCDBG_NUM_FLAGS; i++) {
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if (((1U << i) & active_debugs) &&
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trace_names[i]) {
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len += strlen(trace_names[i]);
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udbg_puts(trace_names[i]);
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break;
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}
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}
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snprintf(buf, UDBG_BUFSIZE, " [%s]: ", current->comm);
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len += strlen(buf);
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udbg_puts(buf);
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while (len < 18) {
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udbg_puts(" ");
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len++;
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}
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va_start(ap, fmt);
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vsnprintf(buf, UDBG_BUFSIZE, fmt, ap);
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udbg_puts(buf);
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va_end(ap);
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}
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}
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unsigned long udbg_ifdebug(unsigned long flags)
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{
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return (flags & ppc64_debug_switch);
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}
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