kernel_optimize_test/drivers/phy/ti
Roger Quadros 325ce0fe58 phy: ti-pipe3: Use TRM recommended settings for SATA DPLL
The AM572x Technical Reference Manual, SPRUHZ6H,
Revised November 2016 [1], shows recommended settings for the
SATA DPLL in Table 26-8. DPLL CLKDCOLDO Recommended Settings.

Use those settings in the driver. The TRM does not show
a value for 20MHz SYS_CLK so we use something close to the
26MHz setting.

[1] - http://www.ti.com/lit/ug/spruhz6h/spruhz6h.pdf

Signed-off-by: Roger Quadros <rogerq@ti.com>
[nsekhar@ti.com: add exact TRM version to commit text]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-20 13:59:47 +05:30
..
Kconfig
Makefile
phy-da8xx-usb.c
phy-dm816x-usb.c
phy-omap-control.c
phy-omap-usb2.c
phy-ti-pipe3.c phy: ti-pipe3: Use TRM recommended settings for SATA DPLL 2017-08-20 13:59:47 +05:30
phy-tusb1210.c phy: tusb1210: implement ->set_mode() 2017-06-09 17:39:39 +05:30
phy-twl4030-usb.c