forked from luck/tmp_suning_uos_patched
e0dd03caf2
Changes in the 1.2 TPM Specification make it necessary to update some fields of the chip structure in the initialization function after it is registered with tpm.c thus tpm_register_hardware was modified to return a pointer to the structure. This patch makes that change and the associated changes in tpm_atmel and tpm_nsc. The changes to tpm_infineon will be coming in a patch from Marcel Selhorst. Signed-off-by: Kylene Hall <kjhall@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
129 lines
3.2 KiB
C
129 lines
3.2 KiB
C
/*
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* Copyright (C) 2005 IBM Corporation
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*
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* Authors:
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* Kylene Hall <kjhall@us.ibm.com>
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*
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* Maintained by: <tpmdd_devel@lists.sourceforge.net>
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*
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* Device driver for TCG/TCPA TPM (trusted platform module).
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* Specifications at www.trustedcomputinggroup.org
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation, version 2 of the
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* License.
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*
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* These difference are required on power because the device must be
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* discovered through the device tree and iomap must be used to get
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* around the need for holes in the io_page_mask. This does not happen
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* automatically because the tpm is not a normal pci device and lives
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* under the root node.
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*
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*/
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#ifdef CONFIG_PPC64
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#define atmel_getb(chip, offset) readb(chip->vendor->iobase + offset);
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#define atmel_putb(val, chip, offset) writeb(val, chip->vendor->iobase + offset)
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#define atmel_request_region request_mem_region
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#define atmel_release_region release_mem_region
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static inline void atmel_put_base_addr(void __iomem *iobase)
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{
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iounmap(iobase);
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}
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static void __iomem * atmel_get_base_addr(unsigned long *base, int *region_size)
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{
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struct device_node *dn;
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unsigned long address, size;
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unsigned int *reg;
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int reglen;
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int naddrc;
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int nsizec;
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dn = of_find_node_by_name(NULL, "tpm");
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if (!dn)
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return NULL;
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if (!device_is_compatible(dn, "AT97SC3201")) {
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of_node_put(dn);
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return NULL;
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}
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reg = (unsigned int *) get_property(dn, "reg", ®len);
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naddrc = prom_n_addr_cells(dn);
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nsizec = prom_n_size_cells(dn);
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of_node_put(dn);
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if (naddrc == 2)
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address = ((unsigned long) reg[0] << 32) | reg[1];
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else
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address = reg[0];
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if (nsizec == 2)
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size =
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((unsigned long) reg[naddrc] << 32) | reg[naddrc + 1];
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else
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size = reg[naddrc];
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*base = address;
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*region_size = size;
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return ioremap(*base, *region_size);
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}
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#else
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#define atmel_getb(chip, offset) inb(chip->vendor->base + offset)
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#define atmel_putb(val, chip, offset) outb(val, chip->vendor->base + offset)
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#define atmel_request_region request_region
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#define atmel_release_region release_region
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/* Atmel definitions */
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enum tpm_atmel_addr {
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TPM_ATMEL_BASE_ADDR_LO = 0x08,
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TPM_ATMEL_BASE_ADDR_HI = 0x09
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};
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/* Verify this is a 1.1 Atmel TPM */
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static int atmel_verify_tpm11(void)
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{
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/* verify that it is an Atmel part */
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if (tpm_read_index(TPM_ADDR, 4) != 'A' ||
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tpm_read_index(TPM_ADDR, 5) != 'T' ||
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tpm_read_index(TPM_ADDR, 6) != 'M' ||
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tpm_read_index(TPM_ADDR, 7) != 'L')
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return 1;
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/* query chip for its version number */
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if (tpm_read_index(TPM_ADDR, 0x00) != 1 ||
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tpm_read_index(TPM_ADDR, 0x01) != 1)
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return 1;
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/* This is an atmel supported part */
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return 0;
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}
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static inline void atmel_put_base_addr(void __iomem *iobase)
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{
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}
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/* Determine where to talk to device */
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static void __iomem * atmel_get_base_addr(unsigned long *base, int *region_size)
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{
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int lo, hi;
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if (atmel_verify_tpm11() != 0)
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return NULL;
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lo = tpm_read_index(TPM_ADDR, TPM_ATMEL_BASE_ADDR_LO);
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hi = tpm_read_index(TPM_ADDR, TPM_ATMEL_BASE_ADDR_HI);
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*base = (hi << 8) | lo;
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*region_size = 2;
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return ioport_map(*base, *region_size);
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}
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#endif
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