forked from luck/tmp_suning_uos_patched
294a3317be
Based on more testing, commit 8ca5ee624b4c ("ARM: OMAP2+: Restore MPU
power domain if cpu_cluster_pm_enter() fails") is a poor fix for handling
cpu_cluster_pm_enter() returned errors.
We should not override the cpuidle states with a hardcoded PWRDM_POWER_ON
value. Instead, we should use a configured idle state that does not cause
the context to be lost. Otherwise we end up configuring a potentially
improper state for the MPUSS. We also want to update the returned state
index for the selected state.
Let's just select the highest power idle state C1 to ensure no context
loss is allowed on cpu_cluster_pm_enter() errors. With these changes we
can now unconditionally call omap4_enter_lowpower() for WFI like we did
earlier before commit 55be2f5033 ("ARM: OMAP2+: Handle errors for
cpu_pm"). And we can return the selected state index.
Fixes: 8f04aea048 ("ARM: OMAP2+: Restore MPU power domain if cpu_cluster_pm_enter() fails")
Fixes: 55be2f5033 ("ARM: OMAP2+: Handle errors for cpu_pm")
Signed-off-by: Tony Lindgren <tony@atomide.com>
328 lines
7.7 KiB
C
328 lines
7.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* OMAP4+ CPU idle Routines
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*
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* Copyright (C) 2011-2013 Texas Instruments, Inc.
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* Santosh Shilimkar <santosh.shilimkar@ti.com>
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* Rajendra Nayak <rnayak@ti.com>
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*/
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#include <linux/sched.h>
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#include <linux/cpuidle.h>
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#include <linux/cpu_pm.h>
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#include <linux/export.h>
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#include <linux/tick.h>
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#include <asm/cpuidle.h>
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#include "common.h"
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#include "pm.h"
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#include "prm.h"
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#include "soc.h"
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#include "clockdomain.h"
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#define MAX_CPUS 2
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/* Machine specific information */
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struct idle_statedata {
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u32 cpu_state;
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u32 mpu_logic_state;
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u32 mpu_state;
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u32 mpu_state_vote;
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};
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static struct idle_statedata omap4_idle_data[] = {
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{
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.cpu_state = PWRDM_POWER_ON,
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.mpu_state = PWRDM_POWER_ON,
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.mpu_logic_state = PWRDM_POWER_RET,
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},
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{
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.cpu_state = PWRDM_POWER_OFF,
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.mpu_state = PWRDM_POWER_RET,
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.mpu_logic_state = PWRDM_POWER_RET,
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},
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{
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.cpu_state = PWRDM_POWER_OFF,
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.mpu_state = PWRDM_POWER_RET,
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.mpu_logic_state = PWRDM_POWER_OFF,
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},
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};
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static struct idle_statedata omap5_idle_data[] = {
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{
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.cpu_state = PWRDM_POWER_ON,
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.mpu_state = PWRDM_POWER_ON,
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.mpu_logic_state = PWRDM_POWER_ON,
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},
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{
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.cpu_state = PWRDM_POWER_RET,
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.mpu_state = PWRDM_POWER_RET,
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.mpu_logic_state = PWRDM_POWER_RET,
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},
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};
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static struct powerdomain *mpu_pd, *cpu_pd[MAX_CPUS];
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static struct clockdomain *cpu_clkdm[MAX_CPUS];
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static atomic_t abort_barrier;
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static bool cpu_done[MAX_CPUS];
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static struct idle_statedata *state_ptr = &omap4_idle_data[0];
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static DEFINE_RAW_SPINLOCK(mpu_lock);
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/* Private functions */
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/**
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* omap_enter_idle_[simple/coupled] - OMAP4PLUS cpuidle entry functions
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* @dev: cpuidle device
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* @drv: cpuidle driver
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* @index: the index of state to be entered
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*
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* Called from the CPUidle framework to program the device to the
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* specified low power state selected by the governor.
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* Returns the amount of time spent in the low power state.
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*/
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static int omap_enter_idle_simple(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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omap_do_wfi();
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return index;
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}
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static int omap_enter_idle_smp(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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struct idle_statedata *cx = state_ptr + index;
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unsigned long flag;
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raw_spin_lock_irqsave(&mpu_lock, flag);
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cx->mpu_state_vote++;
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if (cx->mpu_state_vote == num_online_cpus()) {
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pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
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omap_set_pwrdm_state(mpu_pd, cx->mpu_state);
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}
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raw_spin_unlock_irqrestore(&mpu_lock, flag);
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omap4_enter_lowpower(dev->cpu, cx->cpu_state);
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raw_spin_lock_irqsave(&mpu_lock, flag);
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if (cx->mpu_state_vote == num_online_cpus())
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omap_set_pwrdm_state(mpu_pd, PWRDM_POWER_ON);
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cx->mpu_state_vote--;
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raw_spin_unlock_irqrestore(&mpu_lock, flag);
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return index;
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}
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static int omap_enter_idle_coupled(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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struct idle_statedata *cx = state_ptr + index;
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u32 mpuss_can_lose_context = 0;
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int error;
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/*
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* CPU0 has to wait and stay ON until CPU1 is OFF state.
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* This is necessary to honour hardware recommondation
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* of triggeing all the possible low power modes once CPU1 is
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* out of coherency and in OFF mode.
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*/
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if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
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while (pwrdm_read_pwrst(cpu_pd[1]) != PWRDM_POWER_OFF) {
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cpu_relax();
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/*
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* CPU1 could have already entered & exited idle
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* without hitting off because of a wakeup
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* or a failed attempt to hit off mode. Check for
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* that here, otherwise we could spin forever
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* waiting for CPU1 off.
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*/
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if (cpu_done[1])
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goto fail;
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}
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}
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mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) &&
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(cx->mpu_logic_state == PWRDM_POWER_OFF);
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/* Enter broadcast mode for periodic timers */
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tick_broadcast_enable();
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/* Enter broadcast mode for one-shot timers */
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tick_broadcast_enter();
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/*
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* Call idle CPU PM enter notifier chain so that
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* VFP and per CPU interrupt context is saved.
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*/
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error = cpu_pm_enter();
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if (error)
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goto cpu_pm_out;
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if (dev->cpu == 0) {
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pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
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omap_set_pwrdm_state(mpu_pd, cx->mpu_state);
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/*
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* Call idle CPU cluster PM enter notifier chain
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* to save GIC and wakeupgen context.
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*/
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if (mpuss_can_lose_context) {
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error = cpu_cluster_pm_enter();
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if (error) {
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index = 0;
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cx = state_ptr + index;
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pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
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omap_set_pwrdm_state(mpu_pd, cx->mpu_state);
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mpuss_can_lose_context = 0;
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}
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}
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}
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omap4_enter_lowpower(dev->cpu, cx->cpu_state);
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cpu_done[dev->cpu] = true;
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/* Wakeup CPU1 only if it is not offlined */
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if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
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if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) &&
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mpuss_can_lose_context)
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gic_dist_disable();
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clkdm_deny_idle(cpu_clkdm[1]);
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omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON);
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clkdm_allow_idle(cpu_clkdm[1]);
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if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) &&
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mpuss_can_lose_context) {
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while (gic_dist_disabled()) {
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udelay(1);
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cpu_relax();
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}
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gic_timer_retrigger();
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}
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}
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/*
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* Call idle CPU cluster PM exit notifier chain
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* to restore GIC and wakeupgen context.
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*/
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if (dev->cpu == 0 && mpuss_can_lose_context)
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cpu_cluster_pm_exit();
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/*
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* Call idle CPU PM exit notifier chain to restore
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* VFP and per CPU IRQ context.
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*/
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cpu_pm_exit();
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cpu_pm_out:
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tick_broadcast_exit();
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fail:
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cpuidle_coupled_parallel_barrier(dev, &abort_barrier);
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cpu_done[dev->cpu] = false;
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return index;
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}
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static struct cpuidle_driver omap4_idle_driver = {
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.name = "omap4_idle",
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.owner = THIS_MODULE,
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.states = {
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{
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/* C1 - CPU0 ON + CPU1 ON + MPU ON */
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.exit_latency = 2 + 2,
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.target_residency = 5,
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.enter = omap_enter_idle_simple,
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.name = "C1",
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.desc = "CPUx ON, MPUSS ON"
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},
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{
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/* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
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.exit_latency = 328 + 440,
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.target_residency = 960,
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.flags = CPUIDLE_FLAG_COUPLED,
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.enter = omap_enter_idle_coupled,
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.name = "C2",
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.desc = "CPUx OFF, MPUSS CSWR",
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},
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{
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/* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
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.exit_latency = 460 + 518,
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.target_residency = 1100,
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.flags = CPUIDLE_FLAG_COUPLED,
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.enter = omap_enter_idle_coupled,
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.name = "C3",
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.desc = "CPUx OFF, MPUSS OSWR",
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},
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},
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.state_count = ARRAY_SIZE(omap4_idle_data),
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.safe_state_index = 0,
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};
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static struct cpuidle_driver omap5_idle_driver = {
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.name = "omap5_idle",
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.owner = THIS_MODULE,
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.states = {
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{
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/* C1 - CPU0 ON + CPU1 ON + MPU ON */
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.exit_latency = 2 + 2,
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.target_residency = 5,
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.enter = omap_enter_idle_simple,
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.name = "C1",
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.desc = "CPUx WFI, MPUSS ON"
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},
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{
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/* C2 - CPU0 RET + CPU1 RET + MPU CSWR */
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.exit_latency = 48 + 60,
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.target_residency = 100,
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.flags = CPUIDLE_FLAG_TIMER_STOP,
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.enter = omap_enter_idle_smp,
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.name = "C2",
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.desc = "CPUx CSWR, MPUSS CSWR",
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},
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},
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.state_count = ARRAY_SIZE(omap5_idle_data),
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.safe_state_index = 0,
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};
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/* Public functions */
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/**
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* omap4_idle_init - Init routine for OMAP4+ idle
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*
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* Registers the OMAP4+ specific cpuidle driver to the cpuidle
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* framework with the valid set of states.
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*/
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int __init omap4_idle_init(void)
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{
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struct cpuidle_driver *idle_driver;
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if (soc_is_omap54xx()) {
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state_ptr = &omap5_idle_data[0];
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idle_driver = &omap5_idle_driver;
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} else {
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state_ptr = &omap4_idle_data[0];
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idle_driver = &omap4_idle_driver;
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}
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mpu_pd = pwrdm_lookup("mpu_pwrdm");
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cpu_pd[0] = pwrdm_lookup("cpu0_pwrdm");
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cpu_pd[1] = pwrdm_lookup("cpu1_pwrdm");
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if ((!mpu_pd) || (!cpu_pd[0]) || (!cpu_pd[1]))
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return -ENODEV;
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cpu_clkdm[0] = clkdm_lookup("mpu0_clkdm");
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cpu_clkdm[1] = clkdm_lookup("mpu1_clkdm");
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if (!cpu_clkdm[0] || !cpu_clkdm[1])
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return -ENODEV;
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return cpuidle_register(idle_driver, cpu_online_mask);
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}
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