Hans-Christian Egtvedt 35bf50ccc8 avr32: Implement set_rate(), set_parent() and mode() for pll1 ... This patch is a take two of adding full functionality to PLL1 on AT32AP7000. This allows board-specific code and drivers to configure and enable PLL1. This is useful when precise control over the frequency of e.g. a genclock is needed and requested by users for the ABDAC device. The patch is based upon previous patches from both Haavard Skinnemoen and David Brownell. Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>		2008-04-19 20:40:08 -04:00
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boards	avr32: Use correct config symbol in atstk1004 board code	2008-02-13 14:44:06 +01:00
boot
configs	[AVR32] ATNGW100: Update defconfig	2008-01-25 08:31:43 +01:00
kernel	avr32: Generic clockevents support	2008-04-19 20:40:08 -04:00
lib	read_current_timer() cleanups	2008-02-06 10:41:02 -08:00
mach-at32ap	avr32: Implement set_rate(), set_parent() and mode() for pll1	2008-04-19 20:40:08 -04:00
mm	avr32: Fix broken pte dump code in do_page_fault()	2008-02-13 14:44:04 +01:00
oprofile	avr32: Delete mostly unused header asm/intc.h	2008-04-19 20:40:07 -04:00
Kconfig	avr32: Generic clockevents support	2008-04-19 20:40:08 -04:00
Kconfig.debug	[AVR32] Include instrumentation menu	2008-01-25 08:31:40 +01:00
Makefile	[AVR32] Add support for AT32AP7001 and AT32AP7002	2008-01-25 08:31:41 +01:00