Pavel Pisa b3c6b76ffb [ARM] 4255/1: i.MX/MX1 Correct MPU PLL reference clock value. ... Only System PLL clock source is selectable by CSCR_SYSTEM_SEL bit. MPU PLL is driven by 512*CLK32 for each case. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>		2007-03-12 16:49:35 +00:00
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cpufreq.c
dma.c
generic.c
generic.h
irq.c
Kconfig
leds-mx1ads.c
leds.c
leds.h
Makefile
Makefile.boot
mx1ads.c
time.c