forked from luck/tmp_suning_uos_patched
1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
706 lines
16 KiB
C
706 lines
16 KiB
C
/*
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Support for B2C2/BBTI Technisat Air2PC - ATSC
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Copyright (C) 2004 Taylor Jacob <rtjacob@earthlink.net>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/*
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* This driver needs external firmware. Please use the command
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* "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" to
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* download/extract it, and then copy it to /usr/lib/hotplug/firmware.
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*/
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#define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw"
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#define CRC_CCIT_MASK 0x1021
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/device.h>
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#include <linux/firmware.h>
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#include "dvb_frontend.h"
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#include "nxt2002.h"
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struct nxt2002_state {
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struct i2c_adapter* i2c;
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struct dvb_frontend_ops ops;
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const struct nxt2002_config* config;
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struct dvb_frontend frontend;
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/* demodulator private data */
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u8 initialised:1;
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};
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static int debug;
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#define dprintk(args...) \
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do { \
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if (debug) printk(KERN_DEBUG "nxt2002: " args); \
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} while (0)
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static int i2c_writebytes (struct nxt2002_state* state, u8 reg, u8 *buf, u8 len)
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{
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/* probbably a much better way or doing this */
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u8 buf2 [256],x;
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int err;
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struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
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buf2[0] = reg;
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for (x = 0 ; x < len ; x++)
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buf2[x+1] = buf[x];
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if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
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printk ("%s: i2c write error (addr %02x, err == %i)\n",
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__FUNCTION__, state->config->demod_address, err);
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return -EREMOTEIO;
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}
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return 0;
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}
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static u8 i2c_readbytes (struct nxt2002_state* state, u8 reg, u8* buf, u8 len)
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{
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u8 reg2 [] = { reg };
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struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
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{ .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
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int err;
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if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
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printk ("%s: i2c read error (addr %02x, err == %i)\n",
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__FUNCTION__, state->config->demod_address, err);
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return -EREMOTEIO;
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}
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return 0;
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}
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static u16 nxt2002_crc(u16 crc, u8 c)
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{
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u8 i;
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u16 input = (u16) c & 0xFF;
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input<<=8;
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for(i=0 ;i<8 ;i++) {
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if((crc ^ input) & 0x8000)
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crc=(crc<<1)^CRC_CCIT_MASK;
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else
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crc<<=1;
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input<<=1;
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}
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return crc;
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}
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static int nxt2002_writereg_multibyte (struct nxt2002_state* state, u8 reg, u8* data, u8 len)
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{
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u8 buf;
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dprintk("%s\n", __FUNCTION__);
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/* set multi register length */
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i2c_writebytes(state,0x34,&len,1);
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/* set mutli register register */
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i2c_writebytes(state,0x35,®,1);
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/* send the actual data */
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i2c_writebytes(state,0x36,data,len);
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/* toggle the multireg write bit*/
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buf = 0x02;
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i2c_writebytes(state,0x21,&buf,1);
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i2c_readbytes(state,0x21,&buf,1);
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if ((buf & 0x02) == 0)
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return 0;
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dprintk("Error writing multireg register %02X\n",reg);
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return 0;
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}
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static int nxt2002_readreg_multibyte (struct nxt2002_state* state, u8 reg, u8* data, u8 len)
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{
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u8 len2;
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dprintk("%s\n", __FUNCTION__);
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/* set multi register length */
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len2 = len & 0x80;
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i2c_writebytes(state,0x34,&len2,1);
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/* set mutli register register */
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i2c_writebytes(state,0x35,®,1);
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/* send the actual data */
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i2c_readbytes(state,reg,data,len);
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return 0;
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}
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static void nxt2002_microcontroller_stop (struct nxt2002_state* state)
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{
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u8 buf[2],counter = 0;
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dprintk("%s\n", __FUNCTION__);
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buf[0] = 0x80;
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i2c_writebytes(state,0x22,buf,1);
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while (counter < 20) {
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i2c_readbytes(state,0x31,buf,1);
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if (buf[0] & 0x40)
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return;
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msleep(10);
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counter++;
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}
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dprintk("Timeout waiting for micro to stop.. This is ok after firmware upload\n");
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return;
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}
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static void nxt2002_microcontroller_start (struct nxt2002_state* state)
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{
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u8 buf;
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dprintk("%s\n", __FUNCTION__);
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buf = 0x00;
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i2c_writebytes(state,0x22,&buf,1);
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}
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static int nxt2002_writetuner (struct nxt2002_state* state, u8* data)
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{
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u8 buf,count = 0;
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dprintk("Tuner Bytes: %02X %02X %02X %02X\n",data[0],data[1],data[2],data[3]);
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dprintk("%s\n", __FUNCTION__);
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/* stop the micro first */
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nxt2002_microcontroller_stop(state);
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/* set the i2c transfer speed to the tuner */
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buf = 0x03;
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i2c_writebytes(state,0x20,&buf,1);
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/* setup to transfer 4 bytes via i2c */
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buf = 0x04;
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i2c_writebytes(state,0x34,&buf,1);
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/* write actual tuner bytes */
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i2c_writebytes(state,0x36,data,4);
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/* set tuner i2c address */
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buf = 0xC2;
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i2c_writebytes(state,0x35,&buf,1);
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/* write UC Opmode to begin transfer */
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buf = 0x80;
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i2c_writebytes(state,0x21,&buf,1);
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while (count < 20) {
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i2c_readbytes(state,0x21,&buf,1);
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if ((buf & 0x80)== 0x00)
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return 0;
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msleep(100);
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count++;
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}
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printk("nxt2002: timeout error writing tuner\n");
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return 0;
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}
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static void nxt2002_agc_reset(struct nxt2002_state* state)
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{
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u8 buf;
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dprintk("%s\n", __FUNCTION__);
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buf = 0x08;
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i2c_writebytes(state,0x08,&buf,1);
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buf = 0x00;
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i2c_writebytes(state,0x08,&buf,1);
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return;
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}
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static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
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{
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struct nxt2002_state* state = (struct nxt2002_state*) fe->demodulator_priv;
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u8 buf[256],written = 0,chunkpos = 0;
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u16 rambase,position,crc = 0;
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dprintk("%s\n", __FUNCTION__);
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dprintk("Firmware is %zu bytes\n",fw->size);
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/* Get the RAM base for this nxt2002 */
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i2c_readbytes(state,0x10,buf,1);
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if (buf[0] & 0x10)
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rambase = 0x1000;
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else
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rambase = 0x0000;
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dprintk("rambase on this nxt2002 is %04X\n",rambase);
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/* Hold the micro in reset while loading firmware */
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buf[0] = 0x80;
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i2c_writebytes(state,0x2B,buf,1);
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for (position = 0; position < fw->size ; position++) {
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if (written == 0) {
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crc = 0;
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chunkpos = 0x28;
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buf[0] = ((rambase + position) >> 8);
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buf[1] = (rambase + position) & 0xFF;
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buf[2] = 0x81;
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/* write starting address */
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i2c_writebytes(state,0x29,buf,3);
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}
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written++;
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chunkpos++;
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if ((written % 4) == 0)
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i2c_writebytes(state,chunkpos,&fw->data[position-3],4);
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crc = nxt2002_crc(crc,fw->data[position]);
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if ((written == 255) || (position+1 == fw->size)) {
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/* write remaining bytes of firmware */
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i2c_writebytes(state, chunkpos+4-(written %4),
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&fw->data[position-(written %4) + 1],
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written %4);
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buf[0] = crc << 8;
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buf[1] = crc & 0xFF;
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/* write crc */
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i2c_writebytes(state,0x2C,buf,2);
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/* do a read to stop things */
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i2c_readbytes(state,0x2A,buf,1);
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/* set transfer mode to complete */
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buf[0] = 0x80;
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i2c_writebytes(state,0x2B,buf,1);
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written = 0;
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}
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}
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printk ("done.\n");
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return 0;
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};
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static int nxt2002_setup_frontend_parameters (struct dvb_frontend* fe,
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struct dvb_frontend_parameters *p)
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{
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struct nxt2002_state* state = (struct nxt2002_state*) fe->demodulator_priv;
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u32 freq = 0;
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u16 tunerfreq = 0;
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u8 buf[4];
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freq = 44000 + ( p->frequency / 1000 );
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dprintk("freq = %d p->frequency = %d\n",freq,p->frequency);
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tunerfreq = freq * 24/4000;
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buf[0] = (tunerfreq >> 8) & 0x7F;
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buf[1] = (tunerfreq & 0xFF);
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if (p->frequency <= 214000000) {
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buf[2] = 0x84 + (0x06 << 3);
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buf[3] = (p->frequency <= 172000000) ? 0x01 : 0x02;
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} else if (p->frequency <= 721000000) {
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buf[2] = 0x84 + (0x07 << 3);
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buf[3] = (p->frequency <= 467000000) ? 0x02 : 0x08;
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} else if (p->frequency <= 841000000) {
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buf[2] = 0x84 + (0x0E << 3);
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buf[3] = 0x08;
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} else {
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buf[2] = 0x84 + (0x0F << 3);
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buf[3] = 0x02;
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}
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/* write frequency information */
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nxt2002_writetuner(state,buf);
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/* reset the agc now that tuning has been completed */
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nxt2002_agc_reset(state);
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/* set target power level */
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switch (p->u.vsb.modulation) {
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case QAM_64:
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case QAM_256:
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buf[0] = 0x74;
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break;
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case VSB_8:
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buf[0] = 0x70;
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break;
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default:
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return -EINVAL;
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break;
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}
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i2c_writebytes(state,0x42,buf,1);
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/* configure sdm */
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buf[0] = 0x87;
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i2c_writebytes(state,0x57,buf,1);
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/* write sdm1 input */
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buf[0] = 0x10;
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buf[1] = 0x00;
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nxt2002_writereg_multibyte(state,0x58,buf,2);
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/* write sdmx input */
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switch (p->u.vsb.modulation) {
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case QAM_64:
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buf[0] = 0x68;
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break;
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case QAM_256:
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buf[0] = 0x64;
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break;
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case VSB_8:
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buf[0] = 0x60;
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break;
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default:
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return -EINVAL;
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break;
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}
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buf[1] = 0x00;
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nxt2002_writereg_multibyte(state,0x5C,buf,2);
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/* write adc power lpf fc */
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buf[0] = 0x05;
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i2c_writebytes(state,0x43,buf,1);
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/* write adc power lpf fc */
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buf[0] = 0x05;
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i2c_writebytes(state,0x43,buf,1);
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/* write accumulator2 input */
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buf[0] = 0x80;
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buf[1] = 0x00;
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nxt2002_writereg_multibyte(state,0x4B,buf,2);
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/* write kg1 */
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buf[0] = 0x00;
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i2c_writebytes(state,0x4D,buf,1);
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/* write sdm12 lpf fc */
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buf[0] = 0x44;
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i2c_writebytes(state,0x55,buf,1);
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/* write agc control reg */
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buf[0] = 0x04;
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i2c_writebytes(state,0x41,buf,1);
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/* write agc ucgp0 */
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switch (p->u.vsb.modulation) {
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case QAM_64:
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buf[0] = 0x02;
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break;
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case QAM_256:
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buf[0] = 0x03;
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break;
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case VSB_8:
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buf[0] = 0x00;
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break;
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default:
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return -EINVAL;
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break;
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}
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i2c_writebytes(state,0x30,buf,1);
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/* write agc control reg */
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buf[0] = 0x00;
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i2c_writebytes(state,0x41,buf,1);
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/* write accumulator2 input */
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buf[0] = 0x80;
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buf[1] = 0x00;
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nxt2002_writereg_multibyte(state,0x49,buf,2);
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nxt2002_writereg_multibyte(state,0x4B,buf,2);
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/* write agc control reg */
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buf[0] = 0x04;
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i2c_writebytes(state,0x41,buf,1);
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nxt2002_microcontroller_start(state);
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/* adjacent channel detection should be done here, but I don't
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have any stations with this need so I cannot test it */
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return 0;
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}
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static int nxt2002_read_status(struct dvb_frontend* fe, fe_status_t* status)
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{
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struct nxt2002_state* state = (struct nxt2002_state*) fe->demodulator_priv;
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u8 lock;
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i2c_readbytes(state,0x31,&lock,1);
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*status = 0;
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if (lock & 0x20) {
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*status |= FE_HAS_SIGNAL;
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*status |= FE_HAS_CARRIER;
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*status |= FE_HAS_VITERBI;
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*status |= FE_HAS_SYNC;
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*status |= FE_HAS_LOCK;
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}
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return 0;
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}
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static int nxt2002_read_ber(struct dvb_frontend* fe, u32* ber)
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{
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struct nxt2002_state* state = (struct nxt2002_state*) fe->demodulator_priv;
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u8 b[3];
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nxt2002_readreg_multibyte(state,0xE6,b,3);
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*ber = ((b[0] << 8) + b[1]) * 8;
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return 0;
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}
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static int nxt2002_read_signal_strength(struct dvb_frontend* fe, u16* strength)
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{
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struct nxt2002_state* state = (struct nxt2002_state*) fe->demodulator_priv;
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u8 b[2];
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u16 temp = 0;
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/* setup to read cluster variance */
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b[0] = 0x00;
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i2c_writebytes(state,0xA1,b,1);
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/* get multreg val */
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nxt2002_readreg_multibyte(state,0xA6,b,2);
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temp = (b[0] << 8) | b[1];
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*strength = ((0x7FFF - temp) & 0x0FFF) * 16;
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return 0;
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}
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static int nxt2002_read_snr(struct dvb_frontend* fe, u16* snr)
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{
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struct nxt2002_state* state = (struct nxt2002_state*) fe->demodulator_priv;
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u8 b[2];
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u16 temp = 0, temp2;
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u32 snrdb = 0;
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/* setup to read cluster variance */
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b[0] = 0x00;
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i2c_writebytes(state,0xA1,b,1);
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/* get multreg val from 0xA6 */
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nxt2002_readreg_multibyte(state,0xA6,b,2);
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temp = (b[0] << 8) | b[1];
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temp2 = 0x7FFF - temp;
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|
/* snr will be in db */
|
|
if (temp2 > 0x7F00)
|
|
snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
|
|
else if (temp2 > 0x7EC0)
|
|
snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
|
|
else if (temp2 > 0x7C00)
|
|
snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
|
|
else
|
|
snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
|
|
|
|
/* the value reported back from the frontend will be FFFF=32db 0000=0db */
|
|
|
|
*snr = snrdb * (0xFFFF/32000);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int nxt2002_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
|
|
{
|
|
struct nxt2002_state* state = (struct nxt2002_state*) fe->demodulator_priv;
|
|
u8 b[3];
|
|
|
|
nxt2002_readreg_multibyte(state,0xE6,b,3);
|
|
*ucblocks = b[2];
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int nxt2002_sleep(struct dvb_frontend* fe)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static int nxt2002_init(struct dvb_frontend* fe)
|
|
{
|
|
struct nxt2002_state* state = (struct nxt2002_state*) fe->demodulator_priv;
|
|
const struct firmware *fw;
|
|
int ret;
|
|
u8 buf[2];
|
|
|
|
if (!state->initialised) {
|
|
/* request the firmware, this will block until someone uploads it */
|
|
printk("nxt2002: Waiting for firmware upload (%s)...\n", NXT2002_DEFAULT_FIRMWARE);
|
|
ret = state->config->request_firmware(fe, &fw, NXT2002_DEFAULT_FIRMWARE);
|
|
printk("nxt2002: Waiting for firmware upload(2)...\n");
|
|
if (ret) {
|
|
printk("nxt2002: no firmware upload (timeout or file not found?)\n");
|
|
return ret;
|
|
}
|
|
|
|
ret = nxt2002_load_firmware(fe, fw);
|
|
if (ret) {
|
|
printk("nxt2002: writing firmware to device failed\n");
|
|
release_firmware(fw);
|
|
return ret;
|
|
}
|
|
printk("nxt2002: firmware upload complete\n");
|
|
|
|
/* Put the micro into reset */
|
|
nxt2002_microcontroller_stop(state);
|
|
|
|
/* ensure transfer is complete */
|
|
buf[0]=0;
|
|
i2c_writebytes(state,0x2B,buf,1);
|
|
|
|
/* Put the micro into reset for real this time */
|
|
nxt2002_microcontroller_stop(state);
|
|
|
|
/* soft reset everything (agc,frontend,eq,fec)*/
|
|
buf[0] = 0x0F;
|
|
i2c_writebytes(state,0x08,buf,1);
|
|
buf[0] = 0x00;
|
|
i2c_writebytes(state,0x08,buf,1);
|
|
|
|
/* write agc sdm configure */
|
|
buf[0] = 0xF1;
|
|
i2c_writebytes(state,0x57,buf,1);
|
|
|
|
/* write mod output format */
|
|
buf[0] = 0x20;
|
|
i2c_writebytes(state,0x09,buf,1);
|
|
|
|
/* write fec mpeg mode */
|
|
buf[0] = 0x7E;
|
|
buf[1] = 0x00;
|
|
i2c_writebytes(state,0xE9,buf,2);
|
|
|
|
/* write mux selection */
|
|
buf[0] = 0x00;
|
|
i2c_writebytes(state,0xCC,buf,1);
|
|
|
|
state->initialised = 1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int nxt2002_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
|
|
{
|
|
fesettings->min_delay_ms = 500;
|
|
fesettings->step_size = 0;
|
|
fesettings->max_drift = 0;
|
|
return 0;
|
|
}
|
|
|
|
static void nxt2002_release(struct dvb_frontend* fe)
|
|
{
|
|
struct nxt2002_state* state = (struct nxt2002_state*) fe->demodulator_priv;
|
|
kfree(state);
|
|
}
|
|
|
|
static struct dvb_frontend_ops nxt2002_ops;
|
|
|
|
struct dvb_frontend* nxt2002_attach(const struct nxt2002_config* config,
|
|
struct i2c_adapter* i2c)
|
|
{
|
|
struct nxt2002_state* state = NULL;
|
|
u8 buf [] = {0,0,0,0,0};
|
|
|
|
/* allocate memory for the internal state */
|
|
state = (struct nxt2002_state*) kmalloc(sizeof(struct nxt2002_state), GFP_KERNEL);
|
|
if (state == NULL) goto error;
|
|
|
|
/* setup the state */
|
|
state->config = config;
|
|
state->i2c = i2c;
|
|
memcpy(&state->ops, &nxt2002_ops, sizeof(struct dvb_frontend_ops));
|
|
state->initialised = 0;
|
|
|
|
/* Check the first 5 registers to ensure this a revision we can handle */
|
|
|
|
i2c_readbytes(state, 0x00, buf, 5);
|
|
if (buf[0] != 0x04) goto error; /* device id */
|
|
if (buf[1] != 0x02) goto error; /* fab id */
|
|
if (buf[2] != 0x11) goto error; /* month */
|
|
if (buf[3] != 0x20) goto error; /* year msb */
|
|
if (buf[4] != 0x00) goto error; /* year lsb */
|
|
|
|
/* create dvb_frontend */
|
|
state->frontend.ops = &state->ops;
|
|
state->frontend.demodulator_priv = state;
|
|
return &state->frontend;
|
|
|
|
error:
|
|
kfree(state);
|
|
return NULL;
|
|
}
|
|
|
|
static struct dvb_frontend_ops nxt2002_ops = {
|
|
|
|
.info = {
|
|
.name = "Nextwave nxt2002 VSB/QAM frontend",
|
|
.type = FE_ATSC,
|
|
.frequency_min = 54000000,
|
|
.frequency_max = 860000000,
|
|
/* stepsize is just a guess */
|
|
.frequency_stepsize = 166666,
|
|
.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
|
|
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
|
|
FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
|
|
},
|
|
|
|
.release = nxt2002_release,
|
|
|
|
.init = nxt2002_init,
|
|
.sleep = nxt2002_sleep,
|
|
|
|
.set_frontend = nxt2002_setup_frontend_parameters,
|
|
.get_tune_settings = nxt2002_get_tune_settings,
|
|
|
|
.read_status = nxt2002_read_status,
|
|
.read_ber = nxt2002_read_ber,
|
|
.read_signal_strength = nxt2002_read_signal_strength,
|
|
.read_snr = nxt2002_read_snr,
|
|
.read_ucblocks = nxt2002_read_ucblocks,
|
|
|
|
};
|
|
|
|
module_param(debug, int, 0644);
|
|
MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
|
|
|
|
MODULE_DESCRIPTION("NXT2002 ATSC (8VSB & ITU J83 AnnexB FEC QAM64/256) demodulator driver");
|
|
MODULE_AUTHOR("Taylor Jacob");
|
|
MODULE_LICENSE("GPL");
|
|
|
|
EXPORT_SYMBOL(nxt2002_attach);
|